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In this paper, we demonstrate newly developed process technology to fabricate complementary metal-oxide-silicon field-effect transistors (CMOSFETs) having atomically flat gate insulator film/silicon interface on (100) orientated silicon surface. They include 1,200 C ultraclean argon ambient annealing technology for surface atomically flattening and radical oxidation technology for device isolation, flatness recovery after ion implantation, and gate insulator formation. The fabricated CMOSFET with atomically flat interface exhibit very high current drivability such as 923 and 538 mA/mm for n-channel MOSFET (nMOS) and p-channel MOSFET (pMOS) at gate length of 100 nm when combined with very low resistance source and drain contacts, four orders of magnitude lower 1= f noise characteristics when combined with damage free plasma processes, and one decade longer time dependent dielectric breakdown (TDDB) lifetime in comparison to devices with a conventional flatness. The developed technology effectively improves the performance of the silicon-based CMOS large-scale integrated circuits (LSI).

We demonstrate a low temperature flattening method for the 200-mm-diameter (100) orientation silicon wafers. By annealing in ultra pure argon ambient at 850ºC or above, atomically flat surfaces composed of atomic terraces and steps appear uniformly in the whole 200mm wafer. The width of atomic terrace changes with the off angle of wafer surface. It is found that with the off angle of 0.50º or below, only mono-atomic steps appear on the atomically flat surface, and the terrace widths are almost equal to the calculation values. Moreover, we have found using the vertical furnace the whole 200mm wafer surface can be atomically flattened in shorter time by increasing the argon gas flow rate or the annealing temperature. Furthermore, after annealing at 900ºC or below, there is no slip-line defect in the whole wafer. This low temperature flattening method is very suitable to be applied in the LSI manufacturing.

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The angle-resolved Si 2p photoelectron spectra arising from a interfacial transition layer formed on a Si(100) were measured with a probing depth of nearly 2 nm. The novel analytical procedure of these spectra was developed by considering that one SiO2 monolayer, two compositional transition layers (CTLs), and one Si monolayer constituting the Si substrate surface are continuously connected with each other to maintain the areal density of Si atoms. It was found for thermally grown transition layers that two CTLs are formed on the oxide side of the CTL/Si interface and the chemical structures correlated with the residual stress appear on the Si substrate side of the interface. The effects of oxidation temperature in the range from 900 to 1050 °C, annealing in the forming gas, and oxidation using oxygen radicals on the chemical structures of transition layers formed on both sides of the interface were also clarified.