This paper presents a 9T multi-threshold (MTCMOS) SRAM macro with equalized bitline leakage and a Content-Addressable-Memory-assisted (CAM-assisted) write performance boosting technique for energy efficiency improvement. A 3T-based read port is proposed to equalize read bitline (RBL) leakage and to improve RBL sensing margin by eliminating data-dependence on bitline leakage current. A miniature CAM-assisted circuit is integrated to conceal the slow data development with HVT devices after data flipping in write operation and therefore enhance the write performance for energy efficiency. A 16 kb SRAM test chip is fabricated in 65 nm CMOS technology. The operating voltage of the test chip is scalable from 1.2 V down to 0.26 V with the read access time from 6 ns to 0.85 µs. Minimum energy of 2.07 pJ is achieved at 0.4 V with 40.3% improvement compared to the SRAM without the aid of the CAM. Energy efficiency is enhanced by 29.4% between 0.38 V ~ 0.6 V by the proposed CAM-assisted circuit. Index Terms-Bitline leakage equalization, content addressable memory, energy efficiency improvement, ultra-low voltage SRAM design I. INTRODUCTION TATE-OF-THE-ART DSP cores and advanced healthcare SoCs [1],[2] benefit from availability of on-chip SRAMs with substantially reduced power dissipation and improved energy efficiency. Integrated SRAMs play a crucial role in providing the required density, performance, power, and energy Manuscript

No abstract

No abstract

This work reports a fully parallel match-line (ML) structure with an automated background checking (ABC) scheme. MLs are pre-charged to an intermediate level by a pulsed current source to minimize power. The proposed ABC scheme uses two dummy rows for digitally adjusting the pulse width and the delay of the sense amplifier enable signals of the CAM without disturbing the normal operation. Therefore, it can continuously track the optimum ML swing, making the CAM tolerant to variations. The proposed ABC scheme achieves the power reduction of 5.5× compared with the conventional ML sensing scheme. In addition, multi-V t transistors are used in the CAM cell to reduce the leakage by 15× while improving the ML discharging speed by 2× when compared with the standard-V t devices at 1.2 V, 80°C. A test chip was prototyped using a standard 65 nm CMOS process. The average energy consumption is 0.77 fJ/bit/search at 1.2 V/500 MHz. Index Terms-CAM, match-line, small match line swing, variation tolerant design.

Batteries for contact lenses fabricated by conventional methods could cause severe damage to the eyes if broken. Herein, we present flexible aqueous batteries that operate in tears and provide a safe power supply to smart contact lenses. Nanocomposite flexible electrodes of carbon nanotubes and Prussian blue analogue nanoparticles for cathode and anode were embedded in UV-polymerized hydrogel as not only a soft contact lens but also an ion-permeable separator. The battery exhibited a discharging capacity of 155 μAh in an aqueous electrolyte of 0.15 M Na-ions and 0.02 M K-ions, equivalent to the ionic concentration of tears. The power supply was enough to operate a low-power static random-access memory. In addition, we verified the mechanical stability, biocompatibility and compatibility with a contact lens cleaning solution. It could ultimately enable a safe power supply for smart contact lenses without risk of injury due to the leakage or breakage of the battery.