High performance super TFT's with different channel widths and lengths, formed by a novel grain enhancement method, are reported. High temperature annealing has been utilized to enhance the polysilicon grain and improve the quality of silicon crystal after low temperature MILC treatment on amorphous silicon. With device scaling, it is possible to fabricate the entire transistor on a single grain, thus giving the performance of single crystal SOI MOSFET. The effects of grain boundaries on device performance have been studied, indicating the existence of extra leakage current paths caused by the grain boundaries traversing the channel, which induced subthreshold hump and early punchthrough of wide devices. The probability for the channel region of a TFT to cover multiple grains decrease significantly when the device is scaled down, resulting in better device performance and higher uniformity.

The work function of polycrystalline nickel silicide film formed by rapid thermal annealing ͑RTA͒ has been studied using capacitance-voltage ͑C-V͒ measurements and metal-oxide semiconductor ͑MOS͒ structures. The effect of sintering temperature on work function has also been studied. Results show that the work function of n ϩ -doped NiSi gate is about 4.6 eV and is stable from 400 to 800°C. For p ϩ -doped NiSi gate, the work function is 5 eV. The gate-substrate leakage current is small and the oxide quality is similar to that in Al-gate MOS capacitors even for oxides as thin as 8 nm. The poly-gate depletion effect ͑PDE͒ has also been investigated by quasi-static C-V. Compared with that of poly-Si and poly-Si 1Ϫx Ge x , no PDE is observed in silicide-gate n-MOS device even when the gate is undoped. The results suggest that nickel silicide film may be used as a potential gate material in complementary MOS or thin-film transistor devices.

The growth mechanism of metal-induced-lateral-crystallization (MILC) was studied and modeled. Based on the time evolution of the metal impurity in the amorphous silicon film being crystallized, a model has been developed to predict the growth rate and the final metal distribution in the crystallized polysilicon. The model prediction has been compared with experimental results and high prediction accuracy is demonstrated. Using the model, the effects of annealing temperature, annealing time and initial metal concentration on the final grain size and metal impurity distribution can be analyzed. As a result, the model can be used to optimize the grain growth conditions for fabricating high performance thin-film-transistors on the recrystallized polysilicon film.