SUMMARYThis paper presents a technique for mitigating two well-known DAC non-idealities in continuous-time delta-sigma modulators (CTDSMs), particularly in wide-band and low over-sampling-ratio (OSR) cases. This technique employs a special digital-to-analog convertor (DAC) waveform, called modified returnto-zero (MRZ), to reduce the time uncertainty effect because of the jittered clock at the sampling time instances and eliminate the effect of inter-symbol-interference (ISI) which degrades the modulator performance, especially when non-return-to-zero (NRZ) DAC waveform is chosen in the modulator design. A third-order single-bit CTDSM is designed based on the proposed technique and step-by-step design procedure at circuit and system levels, considering clock jitter and ISI, is explained. Circuit simulations in 180-nm CMOS technology show that in the presence of circuit non-idealities which generate jitter and asymmetrical rise and fall times in the DAC current pulse, signal-to-noise-distortion-ratio (SNDR) of the proposed modulator is higher than the conventional modulator with NRZ waveform by about 10 dB. In these simulations, clock jitter standard deviation is 0.3% of the sampling period (T S ) and the difference between fall/rise times in the DAC current pulse is 4%T S . Simulated at 600-MHz sampling frequency (f S ) with an oversampling ratio (OSR) of 24, SNDR figure of merit (FOM SNDR ) of the proposed modulator in 180-nm CMOS is 300 fj/conversion.

Dynamic ElementMatching (DEM) techniques for Digital-to-Analog Converters (DACs) is an effective approach to achieving good linearity in an oversampling Delta Sigma Modulator (DSM). There are different DEM implementation algorithms from which, Data weighted averaging (DWA) is more suitable due to its reasonable good performance and hardware efficiency. However, it suffers seriously from itself tonal behavior lead to few differently modified structures. Furthermore, decreasing Over Sampling Ratio (OSR) limits its performance. In this case it can be applied together with another similar technique for example Noise Shaping Dynamic Element Matching (NSDEM). This paper, describes a BandPass DEM strategy dedicated to a low OSR Discrete Time Delta Sigma Modulator (DTDSM), which is a well combination of a modified tone free partitioned Data WeightedAveraging (DWA) alongside employing NSDEM technique. The proposed mismatched shaping method achieve a considerably better performance for a low OSR fourth order bandpass multibit Delta Sigma modulator and remove DAC nonlinearity error. The simulation results confirm theoretical aspects. This proposed technique improves both SNDR and SFDR of the DAC, reaching their ideal values.