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The presence of nonlinearities in a fractional-N frequency synthesizer leads to the generation of an additional component of noise that appears in the output phase noise spectrum. This nonlinearity-induced noise component manifests itself as spurious tones and an elevated noise floor, also known as folded noise. This paper presents a mathematical analysis of the folded noise generated in fractional-N phase locked loops (PLL) by the interaction between the quantization noise introduced by the divider controller and a nonlinearity. The analysis is performed for different digital modulators (DDSM) and nonlinearities, providing expressions that allow one to predict the folded noise. These are compared with state-of-the-art predictions and simulation results.

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<p> Digital Delta Sigma modulators (<u>DDSM</u>) are used in applications that require a reduction of the wordlength of a digital signal. In the presence of non-idealities, the quantization error of the DDSM can interact with nonlinearities further along the signal chain and generate spurious tones in addition to excess noise.</p>

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