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A new linearization scheme is proposed, which compensates for nonlinear distortions experienced in the amplitudemodulation path of a digital polar EDGE transmitter integrated in a 65-nm CMOS transceiver system-on-chip (SoC) based on the Digital RF Processor (DRP) technology. The measured amplitude and phase distortions are stored in lookup tables and used for predistortion without requiring inversion computations, thus achieving significant complexity reduction. Adaptive linear interpolation along with adaptive resolution enhancement provides the desired performance across power levels. With the presented scheme, the transmitter's measured performance significantly exceeds the EDGE specifications with an error vector magnitude (EVM) of typically 3% and a close-in modulated spectrum of −64 dB at a 400-kHz offset from the carrier frequency.

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A built-in self-calibration and self-compensation scheme for a digital power pre-amplifier (DPA) of a mobile handset transceiver is proposed. It allows accurate internal measurements of the amplitude and phase distortions experienced in the DPA using the on-chip receiver and processor. A dynamic range of over 60 dB is achieved using multiple gain settings in the receiver. The proposed scheme, in conjunction with the transceiver's digital architecture, is demonstrated in a 65-nm CMOS GSM/EDGE radio, where it allows for accurate and cost-effective self-calibration to be performed in less than 0.1 s.