Crack detection and measurement are essential tasks for maintaining and ensuring safety. Accurate crack detection is very challenging because of non-uniform intensity, poor continuity, and irregular patterns of cracks. The complexity of the background and variability in the data acquisition process also complicate the problem. Many approaches to crack detection have been proposed, but the accuracy of the detection leaves much to be desired. The aim of this study is to develop a practical crack detection method for real-time maintenance. We focus on a deep end-to-end and pixel-wise crack segmentation. We propose a lightweight U-Net-based network architecture with emphasis on the learning process. In order to verify the effectiveness of the proposed method, we conduct tests on publicly available pavement crack datasets and compare our model with state-of-the-art crack detection methods. Extensive experiments show that the proposed method effectively detects cracks in a complex environment, and achieves superior performance.
In recent years Deep Learning reached significant results in many practical problems, such as computer vision, natural language processing, speech recognition and many others. For many years the main goal of the research was to improve the quality of models, even if the complexity was impractically high. However, for the production solutions, which often require real-time work, the latency of the model plays a very important role. Current state-of-the-art architectures are found with neural architecture search (NAS) taking model complexity into account. However, designing of the search space suitable for specific hardware is still a challenging task. To address this problem we propose a measure of hardware efficiency of neural architecture search space -matrix efficiency measure (MEM); a search space comprising of hardware-efficient operations; a latency-aware scaling method; and ISyNet -a set of architectures designed to be fast on the specialized neural processing unit (NPU) hardware and accurate at the same time. We show the advantage of the designed architectures for the NPU devices on ImageNet (Figure 1) and the generalization ability for the downstream classification and detection tasks.• NPU-efficient search space design having high MEM value;
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