One-time factory testing of VLSI components after fabrication is insufficient in the deep submicron era. The products must be tested periodically in the field of application. Due to the complexity of the Systems on a Chip (SoCs), huge amounts of test data are required. However in many embedded systems the capacity of the available memory is a limited resource. Besides in real time embedded systems the in-field testing activities should be accommodated with the real-time constraints of the system. In this paper we at first show the suitability of the LFSR-based Test-Data Compression with Self-Stoppable Seeds method [10] for in-field testing and we give the required enhancements so that can be used as a Preemptive Built-In Self-Test mechanism for in-field testing that is applied at the idle time intervals of a hard real-time embedded system with sporadic tasks. Then, based on a probabilistic model and extensive simulations, we show that in the proposed method the time required to apply all the test vectors to the Circuit Under Test is many times smaller than the time required when the testing procedure consists from one or more non-preemptive test sessions. The proposed method achieves lower energy consumption for testing and significantly smaller fault detection latency times.