No abstract

No abstract

A n e w too2 that synthesizes analog IC layout f r o m a netlist-level description is presented. User defined rules derive partitioning and other control information, based 0% parameters and topology of the circuit. Specialized fast placement and routing Cools and a jlezible module generator environment can cope with the individual requirements of m o s t analog applications. IEEE 1992 CUSTOM INTEGRATED CIRCUITS CONFERENCE 0-7803-0246-X/92 $3.00 Q 1992 IEEE

Algorithms for the length-compensation of bus geometries are presented. The algorithms are capable of automatically rerouting busses such that individual trace lengths are equalized, for an arbitrary number of traces, an arbitrary distribution of starting trace lengths, as well as arbitrary trace widths and intertrace spacings. Algorithms are also presented that allow the automatic adaptation to given space constraints and the observance of minimum structure sizes.

No abstract