Ah.ftracl -We p resent un unomll]OUS llltchup 1:1ilure phellllmenon related to the large Nwcll resistor associated with the gcnerie RC -triggered. MOSFET -based Active Clamp cireui! for on-chip ESD protection between VCC and VSS hus�s. 1\ nm'el Active Clamp circuit with PMOS fecdback tcchnique has been proposed to reduce the Ie's 'lI,ccptihilit�· tll Latchup during negativc current injection at ncig.hboring 1/0 pads or false triggering of the RC trigger circuit due to noise on the VCC power line. The cffccti\'eness of this ncw Actiyc Chlmp circuit is contirmed b�' our e"periment and simulation results, Optimisation of tllc size of the PMOS feedback transistor is also discussed in thi,; pa p er.
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