The paper reports on recent developments in a new technology process in LTS implementation to fabricate intrinsically shunted tunnel junctions. The process has been realized in SINIS multilayer thin-film technology. In various test series, circuits containing a large variety of single junctions and junction arrays of different contact areas and sizes were fabricated and measured. By variation of the oxidation parameters the fabrication process has been optimized for application in integrated circuits operating in RSFQ impulse logic. The junction parameter values realized for the critical current density range to up to about , those for the characteristic voltage to up to about . The junctions show nearly non-hysteretic current-voltage characteristics; the intra-wafer parameter spread is below 10%. The junctions realized fulfil the requirements imposed for digital RSFQ circuit operation at clock frequencies in the lower GHz frequency range.
A method of solution of the Eliashberg equations in the theory of superconductivity is derived which uses the fact that near the transition point the energy gap is small compared to the energies over which the electron-phonon properties vary appreciably. On this basis the Eliashberg equations are converted into linear inhomogeneous integral equations. Their solution is given in operator form and provides a general formula for the transition temperature
At PTB, a new type of fabrication process has been developed to verify rapid single flux quantum (RSFQ) integrated circuits based on intrinsically shunted two-tunnel Josephson junctions (JJs). The process has been realized in LTS implementation using SINIS technology. A variety of single JJs, junction arrays and test circuits have been fabricated and experimentally investigated. The critical current densities of the junctions were set to a nominal value of j C = 500 A cm −2 , with values of the characteristic voltage V C equal to or larger than 160 µV. The JJs show nearly hysteresis-free behaviour (less than 10%); the intrawafer parameter spread is smaller than ±10%. Various basic RSFQ circuits have been realized with operation margins of bias currents of larger than ±20%.
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