The silicon pixel sensor is the core component of the vertex detector in the Circular Electron Positron Collider (CEPC). The JadePix3 is one of the chips designed to study the performance and design of pixel sensors. The chip is a design of the full-function large-size chip based on CMOS technology. To test all the functions and the performance of this chip, we designed a test system based on the IPbus framework. The test system controls the parameters and monitors the status of the pixel chip and off-chip components. The IPbus block read/write speed is extended by jumbo frame feature integration to the IPbus suite for meeting the readout specifications of the JadePix3. The robustness, scalability, and portability of this system have been verified by pulse test, cosmic test and laser test in the laboratory. This paper describes the JadePix3 DAQ and control system, the integration tests, results and performance are included.