This research is motivated by a scheduling problem found in the diffusion and oxidation areas of semiconductor wafer fabrication facilities. With respect to some practical motivated process constraints, like equipment dedication and unequal batchsizes, we model the problem as unrelated parallel batch machines problem with incompatible job families and unequal ready times of the jobs. Our objective is to minimize the total weighted tardiness (TWT) of the jobs. Given that the problem is NPhard, we propose two different solution approaches. The first approach works with a time window-based mixed integer programming (MIP) decomposition. The second approach uses a variable neighbourhood search (VNS). Using randomly generated test instances, we show that the proposed algorithms outperform common dispatching rules that cannot deal with the given constraints effectively. INTRODUCTIONThe planning and optimization of semiconductor manufacturing is a very complex task. Especially, in the field of wafer processing in the front-end a lot of different processing steps have to be performed. These steps are, for example, typical batch tool operations like oven processes and wet-etch processes, or typical cluster tool operations like dry-etch, implant or lithography processes having complex setup strategies. A batching machine allows that several jobs can be processed at the same time. Because of several specific constraints and dependencies, it is challenging to schedule the jobs. Moreover, meeting customer due dates is one of the important manufacturing objectives. Because of the complex nature of the process, the customer due date is set for each operation as operation due date (ODD) (cf. Rose 2003). The task to be solved consists in meeting these due dates for each job within each work center as good as possible with respect to different job priorities.In this paper, we focus on diffusion and oxidation operations which are performed on batch machines, i.e. furnaces. Because of the long processing times of batch tools an effective scheduling of the furnace operation has an huge impact on global manufacturing objectives (cf. Mehta and Uzsoy 1998). Though several jobs can be processed simultaneously on these batch processing machines, the process restrictions require that only jobs belonging to the same family can be processed together at the same time. Further process restrictions specify that not all families can be processed by every machine (equipment dedication) and that machines can have different capacities. These equipment dedication constraints mainly represent different equipment qualifications. Especially for research and development wafer fabs with high product mixtures and constantly new developments, these constraints make the manufacturing control more sophisticated. In addition, the jobs to be processed have different priorities/weights, due dates, and ready times. So, in the case of unequal ready times, it is sometimes advantageous to form a non-full batch while in other situations it is a better strategy to wai...

Scheduling is one of the key factors for semiconductor fabrication productivity. Objectives like lot cycle time and throughput must be optimized to push the technological development and secure the existence on the rapid growing global market. But especially in the frontend the manufacturing process is dominated by cluster-tools and reentrance flows which makes a production planning and optimization very hard. The workflow here is mostly controlled only by dispatch rules. To get a further improvement in manufacturing planning strategies, there is an increasing request of exact or simulation-based solution methods for specified work centers or bottleneck machine groups. One example of this is the semiconductor oven process. Here, complex batch processes with a lot of restrictions have to be scheduled. A reduction of cycle time in this section by optimized manufacturing strategies has a great influence on all global optimization objectives. Two approaches are investigated in this paper.

The semiconductor manufacturing process is usually divided in two parts: frontend and backend. In contrast to the frontend, where the manufacturing process is dominated by cluster-tools and cyclic routes, the backend has a predominant linear structure. In contrast to the frontend flow which is mostly controlled by dispatch rules, the backend process is suitable for real scheduling. A scheduling system for the backend of Infineon Technologies Dresden based on a Discrete Event Simulation (DES) system was developed and tested in the real industrial environment. The simulation model is automatically generated from the databases of the manufacturer. The system is used for short term scheduling -from one shift up to one week. The paper will focus on the aspect of optimizing the process flow and calculating exact release dates for lots. The basic principles are applicable not only in the semiconductor industry but also in other industrial sectors.

Facilities for wafer fabrication are one of the most complex manufacturing systems. Typically, the bottleneck of such facilities is the photolithography area because of its highly expensive tools and complex resource constraints. In this research, a multistage mixed integer programming based optimization approach for planning of such an area is presented. Thereby, several existing process constraints like equipment dedications, resist allocation, vertical dedications, mask availability are taken into account on the basis of different granularity levels. Altogether eleven different optimization models are presented within four different decomposition stages. Thereby, objected goals are the maximization of throughput, the minimization of setup costs and a balancing of machine utilization. On the basis of real manufacturing data the benefit of the proposed approach is evaluated within a first prototype. INTRODUCTION AND PROBLEM DESCRIPTIONThe planning and optimization of semiconductor manufacturing is a very complex task. Especially in the field of wafer processing -the so-called front-end -a lot of different processing steps are performed. These steps are for example typical batch tool operations like oven-and wet-etch processes, or typical cluster tool operations like dry-etch, implant or lithography processes. They have to be repeated to subsequently structure different layers of integrated circuits on the wafers (cf. Figure 1, left). Because of several workcenter-specific constraints and dependencies, these steps are hard to schedule. This is even more complex for facilities with concurrent business modes like production in parallel to research and development processes. That means a wider product mix and a potentially increased number of high-priority lots. As a consequence of complexity the overall scheduling problem is dissected. Also, workcenterspecific optimization approaches are developed. Usually the photolithography area is a bottleneck workcenter of a wafer fab because of its highly expensive machines and its complex process constraints (cf. Chung and Huang 2008). So, an effective planning of the photolithography area will have a high practical relevance for the whole fab. Generally, in this process a resist is structured to act as a direct mask for subsequent structuring of the underlying substrate material. The photolithography process comprises several sub-processes. Firstly, adhesives are added and moisture is removed from the surface. This is followed by a resist coating, the exposure process and the development of the resist. Finally, there is a curing and an inspection of the resist. The main photolithography process -the exposure -is depicted in Figure 1 (right). Thereby, a reticle (mask) is used to structure a resist layer with the desired circuit pattern. So, for every new layer with a changing pattern, the reticle has to be exchanged. Since integrated circuits are commonly created layer by layer, many cycles of 2474 978-1-4244-9865-9/10/$26.00 ©2010 IEEE

The main idea of the presented new approach is to join a discrete event simulation (DES) and mathematical programming techniques (i.e. mixed integer programming, MIP) for optimization of complex manufacturing processes. Thereby, a DES model allows a detailed problem description. For a target oriented optimization several capacity allocation problems are solved by a MIP solver, reducing the degrees of freedom in the DES model. As an example a typical parallel machine scheduling problem arising in semiconductor industry was chosen. Different process constraints like machine dedications, setups, auxiliary resources and processing time dependences are discussed -advantages and disadvantages of simulationbased and exact scheduling approaches are drafted. The investigated optimization goals comprise the reduction of total tardiness and setups efforts as well as a balanced machine utilization. Based on real manufacturing data of a wafer test area this approach is evaluated. INTRODUCTIONScheduling approaches in semiconductor manufacturing have been published for more than ten years. Most of them are special solutions. Up to this day there has been no general solution which answers the question "how to optimize." There is no commercial product available yet that is ready to use for the daily scheduling tasks without modifications. One of the reasons for this is that most of the practice-oriented scheduling tasks are NP-hard optimization problems (Brucker 2004). Hence, for solving complex scheduling problems, a lot of heuristics and decomposition methods were developed and investigated. A comprehensive overview about several of such approaches can be found in Ovacik and Uzsoy (1997) or Gupta and Sivakumar (2002). Thereby, problem-specific heuristics in combination with simulation and scheduling systems have shown the best efficiency. To model dynamic manufacturing systems with complex resource constraints and large problem sizes (hundreds of jobs and machines), DES systems are primarily used. As one of the first scientists, Sivakumar (1999) issued an online capable simulation model for test equipment groups based on automated model generation. Such online parameterized models are also described in Potoradi et al. (2002) or Horn et al. (2006. But especially when using simulation, not only as a parameter forecast instrument but also for online scheduling decisions, several optimization aspects are requested.Basically, a DES system is not an optimization system. It operates time directed and based on priority rules. So, the benefit of using simulation is primarily the knowledge of "what would be happen …" if the rules in the DES model reflecting the rules in the modeled manufacturing system. To enhance a DES system to an optimization system, primarily the method of simulation-based optimization is used (Fu, Glover and April 2005). This technique allows a comparison of different schedules by simulating a model several times. Therefore, the DES model contains a set of control variables influencing the behavior of the DES 1981 9...