Abstract-Fast and reliable DC fault detection is one of the main challenges for modular multilevel converter (MMC) based DC grid with DC circuit breakers (DCCBs). This paper extracts the high frequency components of transient voltages by wavelet transform and proposes a fault identification method based on the difference of transient voltages to identify the faulted lines for DC grids using overhead lines. Meanwhile, a faulted pole discrimination method based on the difference between the change of positive and negative pole voltages is presented. A line protection scheme including detection activation, fault identification, faulted pole discrimination and post-fault re-closing is designed. Using only the local measurements, the scheme can realize the protection of the whole line without communication and has the capability of fault resistance endurance and anti-disturbance. The proposed method is tested with a four-terminal MMC based DC grid in PSCAD/EMTDC. The selection methods of threshold values are presented and the impact of DCCB operation on the reliability of DC fault protection is analysed. Simulation results verify the fast detection and reliability of the designed DC line protection scheme. Index Terms-DC fault protection, fault identification, transient voltage, hybrid DC breaker, modular multilevel converter (MMC), post-fault re-closing.This paper is a post-print of a paper submitted to and accepted for publication in IEEE Transaction on Power Delivery and is subject to Institution of Electrical and Electronic Engineering
Design and operation of FB (full bridge) MMC that meets HVDC specifications are studied in this paper. Three new design parameters: the over-modulation index (k MMC), the DC modulation index (M dc), the minimal DC voltage (V minpu) are introduced to specify the operation of a FB MMC. Power increase and semiconductor count increase with the increase of k MMC is analyzed to understand benefits of over-modulation. The required number of submodules and the number of more-costly FB submodules for specified rated dc voltage, V minpu and k MMC are calculated. The relationship of the submodule inserting logic and dynamics of an arm is analyzed. The submodule voltage balancing is studied and the constraints on the required number of FB submodules are deduced. The capability of over-modulation and the operation under low DC voltage with optimal submodule count are verified using EMTP simulation.
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