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The multi-stage nehvork bascd on clos network is rviddy used to build a scalable architcctura for highperformance switches and routers. Many scheduling algorithms havc been proposed to improvc the performance of this architecture. Most high-speed switches and routers with R multi-stage architecturc using a twice-matching schcduling algorithm, "push" the packcts to the egrcss by two-hop scheduling algorithms. These algorithms, however, can not schedule precisely and optimize the packet delay.In this paper, we present an efficient scheme called "Asynchronous credit-based scheduling schemc" for scheduling both fixed-size o r variable length packcts on highspeed packet switches with a multi-strgc nrchitccturc. Asynchronous credit-based scheduling schcmc is n "pull" scheme which can achicvc 100% throughput under uniform traffic with comparablc dclay performance and also support different QoS disciplines. It improves the effcctive utilization of each output port and significantly reduces thc packet delay.

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