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To meet increasingly challenging and complex systems requirements, it is not enough to use one single semiconductor technology but to integrate several high performance technologies in an efficient and cost effective way. Heterogeneous integration (HI) approaches lead to a significant higher design flexibility and performance. In this paper we present some of the HI approaches that are being used and developed at Northrop Grumman Space Technology (NGST) that include selective epitaxial growth, metamorphic growth and wafer level packaging (WLP) technology. More recently we are developing a scaled and selective wafer packaging technique to integrate III-V semiconductors with silicon under the COSMOS DARPA program.

Northrop Grumman Space Technology has developed an integration technology, Advanced Heterogeneous Integration (AHI) that is capable of intimately integrating RF compound semiconductor devices with digital devices. The integration approach is based on a direct face-to-face bonding between prefabricated semiconductor and CMOS wafers. It is capable of integrating CS (compound semiconductor) devices from smaller wafer substrates to a larger Si host wafer as well as integrating multiple CS technologies onto the same Si CMOS host wafer. The AHI process is compactable with any semiconductor technology. In this paper, both the integration approach and the thermal considerations of integrated devices are discussed, and the results from these integration demonstrations are presented.