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A logic designer today faces a growing number of design requirements and technology restrictions, brought about by increases in circuit density and processor complexity. At the same time, the cost of engineering changes has made the correctness of chip implementations more important, and minimization of circuit count less so. These factors underscore the need for increased automation of logic design. This paper describes an experimental system for synthesizing synchronous combinational logic. It allows a designer to start with a naive implementation produced automatically from a functional specification, evaluate it with respect to these many factors, and incrementally improve this implementation by applying local transformations until it is acceptable for manufacture. The use of simple local transformations in this system ensures correct implementations, isolates technology-specac data, and will allow the total process to be applied to larger, VLSI designs. The system has been used to synthesize masterslice chip implementations from functional specacations, and to remap implemented masterslice chips from one technology to another while preserving their functional behavior. Several tools have been developed at Carnegie-Mellon University to support the early part of the design cycle [ll-141. In one experiment [15] the CMU-DA (Carnegie-Mellon University-Design Automation) system was used to implement the data path portion of a Digital Equipment Corporation (DEC) PDP3/E. It began with a functional Copyright 1981 by International Business Machines Corporation. Copying is permitted without payment of royalty provided that (1) each reproduction is done without alteration and (2) the Journal reference and IBM copyright notice are included on the first page. 272 The title and abstract may be used without further permission in computer-based and other information-service systems. Permission to republish other excerpts should be obtained from the Editor.

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The resolution principle, an automatic inference technique, is studied as a possible decision procedure for certain classes of first-order formulas It is shown that most previous resolution strategies do not decide satlsfiabihty even for "simple" solvable classes Two new resolution procedures are described and are shown to be complete (1 e semidecislon procedures) In the general case and, m addition, to be decision procedures for successively wider classes of first-order formulas These include many previously studied solvable classes The proofs that a complete resolutmn procedure will always halt (without producing the empty clause) when apphed to satisfiable formulas in certain classes provide new, and in some cases more enlightening, demonstrations of the solvablhty of these classes A technique for constructing a model for a formula shown satisfiable in this way is also described KEY WORDS AND PHRASES theorem proving, resolutmn, first-order logic, predicate calculus, decision procedure, solvable case, model, semantic tree CR CATEGORIES 3 60, 5.21, 5 27 IntroductmnMuch of the previous research in automatm theorem proving (here taken to be the study of algorithms for demonstrating the unsatisfiability of first-order formulas) has centered on the resolution method of J.A. Robinson [28]. This technique operates on a set of clauses (each a set of signed atomic formulas) corresponding to a formula of first-order logic. The method is a semideclsion procedure" Given an unsatlsfiable formula, it is guaranteed to generate the empty clause, demonstrating the unsatisfiablhty. By well-known results of Church [5] and Turlng [32], there can be no general dec~swn procedure, which would demonstrate the satisfiabihty or unsatisfiabihty of any first-order formula submitted. There are, however, well-known and easily specified classes of formulas, called solvable classes, for which the question of satisfiabflity or unsatisfiability can be effectively decided; many solvable and unsolvable classes have been extensively investigated.Since Robinson's result, most research in automatm theorem proving has been concerned with the development of strategies for resolutmn which maintain its completeness while attempting to hasten the productmn of the empty clause when given an unsatisfiable formula. Performance of these methods on satisfiable formulas is rarely considered (presumably because they cannot be guaranteed to halt when given such sets of clauses). But complete resolutmn procedures may terminate without generating the empty clause by reaching a point when no new clauses are

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