In this work, Ti/interfacial layer (IL) /n-Ge MIS structures with TiO x IL formed by different methods were compared on depinning the Fermi level (FL) between n-Ge and metal. It is found that with the TiO x IL formed by sputtered Ti with a post-deposition annealing (PDA) at 150°C, a low SBH, around 0.08 eV of the Ti/IL/Ge MIS structure is obtained with around 2 nm IL, while SBH of 0.24 eV is obtained for 3 nm TiO 2 formed by atomic layer deposition (ALD). The IL formed for the sputtered Ti itself can also reduce the SBH to 0.3 eV while the E-beam evaporated (EBE) Ti cannot depin the FL. TEM and XPS results show that a Ti-O-Ge interlayer formed for the TiO x formed during PDA process and for the sputtered Ti itself, a TiO x layer also formed yet the O content is much less than the former, which might be the reason of less Fermi-level pinning (FLP) effect. This work provides a promising technique in solving the contact barrier problem caused by FLP for nanoscale Ge n-channel devices.