Nano-structured silicon is an attractive alternative anode material to conventional graphite in lithium-ion batteries. However, the anode designs with higher silicon concentrations remain to be commercialized despite recent remarkable progress. One of the most critical issues is the fundamental understanding of the lithium–silicon Coulombic efficiency. Particularly, this is the key to resolve subtle yet accumulatively significant alterations of Coulombic efficiency by various paths of lithium–silicon processes over cycles. Here, we provide quantitative and qualitative insight into how the irreversible behaviors are altered by the processes under amorphous volume changes and hysteretic amorphous–crystalline phase transformations. Repeated latter transformations over cycles, typically featured as a degradation factor, can govern the reversibility behaviors, improving the irreversibility and eventually minimizing cumulative irreversible lithium consumption. This is clearly different from repeated amorphous volume changes with different lithiation depths. The mechanism behind the correlations is elucidated by electrochemical and structural probing.

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An inverted bit-line sense amplifier (BLSA) equipped with offset compensation capability for low-power DRAM applications is proposed. The sequential operation of the inverted BLSA allows us to eliminate the edge dummy array in an open bit-line structure resulting in 1.7% less total chip area despite of 10% area penalty of the proposed BLSA occupied by extra switches. For 8-Gb DRAM in 20-nm class technology, the read failure induced by Vth variability is completely removed due to the offset cancellation. The proposed BLSA maintains the gradual increase of the sensing delay when decreasing the power supply down to 0.6 V, while intrinsic read fail prevails below 0.9 V with the conventional one.