The effect of chip-mounting attachment on the thermal resistance of GaAs power field effect transistor (FET) modules has been experimentally investigated. The thermal resistance was evaluated for different GaAs chip thickness of 150 and 250 m through an electrical method utilizing temperature dependence of Schottky-barrier in the GaAs metal semiconductor FET's (MESFET's). The thermal resistance of low-cost epoxy-mounted GaAs chips, suitable for uniplanar monolithic microwave IC's (MMIC's), was found not to increase even up to a chip thickness of 250 m, while that of AuSn-mounted GaAs chips increased as was conventionally expected. Numerical simulation has also been presented for the similar case of GaAs power MMIC's. The result of simulation suggests that lower thermal conductivity of attachment material, such as epoxy attachment, leads to larger optimum chip thickness that minimizes the total thermal resistance.
Reliability of Ti–Pt–Au and Ti–Mo–Au systems has been investigated for GaAs integrated circuit first-level metallizations on semi-insulating GaAs substrates and second-level metallizations on interlayer SiO2 films using Auger depth profile analysis, residual resistance examination and temperature storage step-stress testing. Auger analysis and residual resistance examination showed significant reaction between first-level Ti–Pt–Au and GaAs substrates during metallization processes, while Ti–Mo–Au system with the electron-beam evaporated Mo film showed higher thermal stability because the Mo film acted as a good diffusion barrier between GaAs and Au. The second-level Ti–Pt–Au on SiO2 was found to be free from the reaction with GaAs substrates, and its degradation was ascribed to interdiffusion of composite metals. The resistance increase in step-stress testing for the second Ti–Pt–Au was analyzed on the basis of a new diffusion-controlled model, and long-term reliability was estimated. A mean time to failure value of 3×105 h at 150 °C was obtained for a failure defined as 10% increase in resistance. Much higher reliability was estimated for Ti–Mo–Au, because the resistance continued to decrease as long as 3000 h at 250 °C. The decrease in resistance clearly indicates defect annealing with reduced defect scattering in Au layers. This also shows that foreign metal diffusion into Au, acting as impurity scattering centers, is perfectly eliminated by Mo diffusion barriers.
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