A primary-auxiliary temperature sensing scheme for system-on-a-chip application is proposed in this paper. Taking advantage of the high accuracy and linearity of the analog primary temperature sensors and low production cost of the digital auxiliary temperature sensors, this sensing scheme monitors multiple hotspots in a highly integrated system chip with small area and low power. A cost efficient calibration strategy based on the difference of calibration complexity and sensitivity to the MOSFET aging between the primary and auxiliary temperature sensors is also presented in this paper. Both the temperature sensor prototypes are designed and fabricated with a 90-nm CMOS process technology. The core area of the primary/auxiliary temperature sensors is 0.039/0.001 mm 2 , and consumed energy per conversion is 20.06/0.136 nJ/S with a 1 V supply voltage and 100-kS/s conversion rate. The performance of the temperature sensors and the accuracy improvement of the proposed calibration method are proved with the measurement results.

Real-time on-chip measurement of bit error rate (BER) for high-speed analog-to-digital converters (ADCs) does not only require expensive multi-port high-speed data acquisition equipment but also enormous post-processing. This paper proposes a low-cost built-in-self-test (BIST) circuit for high-speed ADC BER test. Conventionally, the calculation of BER requires a high-speed adder. The presented method takes the advantages of Gray coding and only needs simple logic circuits for BER evaluation. The prototype of the BIST circuit is fabricated along with a 5-bit high-speed flash ADC in a 90-nm CMOS process. The active area is only 90 μm × 70 μm and the average power consumption is around 0.3 mW at 700 MS/s. The measurement of the BIST circuit shows consistent results with the measurement by external data acquisition equipment. key words: built-in self-test (BIST), bit error rate (BER), analog-to-digital converter (ADC)