The advanced microelectronics in the last decades provide each year new tools and devices making it possible to design more and more efficient artificial vision systems capable of meeting the constraints imposed. All the elements are thus brought together to make artificial vision one of the most promising, even unifying scientific "challenges" of our time. This is because the development of a vision system requires knowledge from several disciplines, from signal processing to computer architecture, through theories of probability, linear algebra, computer science, artificial intelligence and analog and digital electronics. The work proposed in this paper is located at the intersection of embedded systems and image processing domains. The objective is to propose an embedded vision system for video acquisition and processing by adding hardware accelerators in order to extract some image characteristics. With the introduction of reconfigurable platforms, such as new All Programmable System on Chip (APSoC) platforms and the advent of new high-level Electronic Design Automation (EDA) tools to configure them, FPGA-SoC based image processing has emerged as a practical solution for most computer vision problems. In this paper, we are interested in the design and implementation of an embedded vision system. This design facilitates video streaming from the camera to the monitor and hardware processing over real-time FPGA-SoC.