A burn-in test aims to screen out hidden defects in a circuit generated by the production process. The detection efficiency is mainly affected by factors such as the welding process, circuit board design and detection algorithm. To improve the efficiency of the burn-in test for detection and improve the recognition rate of circuit fault, this study proposed an analogue circuit fault-detection method and burn-in test model in combination with the advantages of simulated annealing and extreme learning machine algorithms. The convergence and search global optimal solution of simulated annealing, and the relationship between the convergence speed, number of hidden layers and extension algorithms of the extreme learning machine was investigated. The results show that the proposed new algorithm can be used for the comprehensive burn-in test of products. The accuracy of fault recognition based on the very fast simulated annealing extreme learning machine algorithm in the failure test of Sallen-Key filter is 92.5%, and the accuracy of incremental extreme learning machine, convex incremental extreme learning machines, and enhanced incremental extreme learning machine algorithms have increased by 2%, 3.3%, and 4.7%, respectively. Meanwhile, Very Fast Simulated Annealingextreme learning machine has a fast convergence rate and a compact network structure that can reduce the detection time and improve the efficiency of detection. This method can solve the inability of the circuit device to completely function in the burn-in test system and can improve the ability of the product to accurately detect the fault position. This study provides a new reference plan for the burn-in test of electronic products in production lines.

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