The subthreshold slope, transconductance, threshold voltage, and hysteresis of a carbon nanotube field-effect transistor ͑CNT FET͒ were examined as its configuration was changed from bottom-gate exposed channel, bottom-gate covered channel to top-gate FET. An individual single wall CNT was grown by chemical vapor deposition and its gate configuration was changed while determining its transistor characteristics to ensure that the measurements were not a function of different chirality or diameter CNTs. The bottom-gate exposed CNT FET utilized 900 nm SiO 2 as the gate insulator. This CNT FET was then covered with TiO 2 to form the bottom-gate covered channel CNT FET. Finally, the top-gate CNT FET was fabricated and the device utilized TiO 2 ͑ ϳ 80, equivalent oxide thickness= 0.25 nm͒ as the gate insulator. Of the three configurations investigated, the top-gate device exhibited best subthreshold slope ͑67-70 mV/ dec͒, highest transconductance ͑1.3 S͒, and negligible hysteresis in terms of threshold voltage shift.

International audienceIn this paper, we report the development of an asymmetrical cladding single-section InAs/InP quantum-dash mode-locked laser (MLL). The asymmetrical cladding structure allows us to decrease the internal losses and to increase the optical eigenmode mode size. We have measured continuous-wave power superior to 400 mW and RF linewidth as narrow as 300 Hz for passive modelocking. We have compressed the optical signal using the dispersion of a single-mode fiber (SMF) and we have measured the delay between groups of optical modes for different SMF lengths. With the appropriate SMF length, we have obtained a quasi-null delay. In this configuration, subpicosecond pulses with 18 W peak power have been demonstrated for 10-GHz MLL. These performances demonstrate the potential of InAs/InP MLL for frequency comb generation up to tetahertz domain and high peak power optical pulse generation

International audienceWe have developed a 1-mm-long high-power DFB laser using an asymmetrical cladding based on the dilute waveguide technique. We have obtained about 180 mW output power at 25 °C and >30 mW at 15 °C-85 °C chip temperature with >55-dB sidemode suppression ratio. This temperature range allows a 9.7-nm wavelength tunability. For high output power, the relative intensity noise is lower than −160 dB/Hz in the 0.08-40-GHz frequency range and the optical linewidth is better than 300 kHz