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Effect of fluoride‐based plasma treatment on performance stability of AlGaN/GaN HFET was systematically investigated. The plasma‐based processes can introduce different type of damage that can be permanent or temporary, depending on electrical field in the device, plasma density, and energy of radicals and total process thermal budget. In order to understand more clearly the mechanism of fluorine based plasma treatment on device performance, we compare the effects of Ar, O2 and CF4 based plasma treatments applied before gate definition. Ar plasma was chosen for comparison with CF4 because of high ionization rate of Ar and chemically neutral behavior of Ar ions. Under the same medium range of 40 V DC bias in RIE system for these two gases, the shift of drain current and threshold voltage was similar that indicate the common mechanism of plasma damage. We supposed that the major effect for this phenomenon is a negative electron charge inserted in semiconductor during plasma treatment, because at the same accelerated field the penetration depth for electrons is higher than the penetration depth for fluoride ions. Devices stressed under impact ionization conditions show an improvement of breakdown voltage (for O2 plasma treatment) and some recovery of threshold voltage similar to “walkout effect”. This performance non‐stability raise the serious concern about application of fluorine based technology for power applications, where large voltage/current swing may push device to the impact ionization region. The experimental results show that the implementation of fluoride based plasma treatment for power device manufacturing can affect the performance stability of AlGaN/GaN power HFET. (© 2008 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)

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Working at high RF power leads gallium nitride (GaN) high electron mobility transistors (HEMT) to self-heating that poses a limit to device performances and reliability. Thermal characterization is therefore of great value for proper design of heat dissipation and also for device reliability studies. The peak power dissipation in HEMT devices is located in the channel near the gate edge, which is typically buried under a field plate. This hot spot is thus inaccessible to direct temperature measurement. Therefore, any method used for temperature measurement has to be augmented by a thermal simulation to calculate the actual temperature in the channel from temperature measured elsewhere. In this work, we used thermal imaging to measure temperature during device operation in various pulsed RF conditions. To obtain the hot spot temperature, we developed a thermal simulation of AlGaN/GaN HEMT transistor on SiC substrate. The simulation estimates the channel temperature using 3D finite element method with multi-parameter input. To calibrate the simulation, we compared simulation results with IR images of a 2 mm AlGaN/GaN HEMT transistor operating at various pulsed RF conditions. The simulation is typically slow. In this work, we used the calibrated simulation to study the hot spot temperature as a function of the working conditions and formulated an approximated equation for the thermal behavior of the transistor as a function of power dissipation, base plate temperature, pulse width, and pulse duty cycle that may be used to estimate the channel temperature in real time.

The Schottky gate leakage current of AlGaN/GaN HFET was systematically investigated. Experimental results were acquired from gates of HFET and from round diodes on the same wafer. The performed analysis clearly shows that HFET gate current behaves according to additional physical mechanism. Hypothesis, that the source of parasitic leakage is the contact point between gate metal and two dimensional electron gas on the mesa edges, was theoretically and experimentally proved. Cost effective technological solution with SiO2 "patch" layer is presented. Transistors, manufactured with "patch" layer, have higher breakdown, two orders of magnitude lower gate leakage current, excellent performance and should be more reliable. .For AlGaN/GaN HFETs without dielectric under gate layer the high gate leakage current and its physical origin remains an outstanding challenge and is actively researched for last few years [5,6]. Dominant role of tunneling current was shown in [7] that explains well the high reverse-bias leakage current but the contribution of lateral tunneling injection can not explain the anomalous gate current I-V characteristics for the forward bias region. However during the large signal operation, when FET works in 2 ÷ 3 dB compression conditions, the gate current is affected primarily by the forward branch of the diode I-V characteristics. Therefore to improve the reliability of high power targeted AlGaN/GaN HFETs, special attention should be paid to understanding of forward I-V characteristics. In present work, the Schottky gate leakage current was systematically investigated and cost effective technological solution, based on physical understanding, is proposed. State-of-the art Schottky gate contact behavior with low leakage current and high and reliable Schottky barrier is presented.