Due to a recent growth in three-dimension (3D) printing technology, engineers can fabricate affordable and versatile antennas; however, lossy conductive materials, inadequate antenna terminations, and simplistic designs which do not adequately utilize the available volume continue to limit the capabilities of 3D printed antennas. In this work, the dielectric constants of three polylactic acid (PLA) materials, dielectric PLA, magnetic PLA and conductive PLA, were measured using the coaxial transmission line method, and the results were compared with measurements using the commercially available coaxial probe method. Based on published dielectric constants for solid non-printed PLA, a variety of antenna designs were simulated and fabricated. Each of these antenna designs addressed a certain shortcoming faced by 3D printed antennas. The antennas were designed with a target resonant frequency of 2.45 GHz, an impedance bandwidth of at least 500 MHz, and a gain greater than 1.5 dBi. The three antennas presented here are a fractal bow-tie antenna (FBTA), a spiral antenna, and a Yagi-Uda antenna.
Techniques of a dual-path error amplifier and two capacitor multipliers for providing on-chip frequency compensation and soft-start function are proposed in this paper. The concept of the dual-path error amplifier is to use two currents to charge and discharge a compensation capacitor simultaneously. As a result, the equivalent capacitance is enlarged significantly with little additional power and silicon area. The dc-dc converter with the dual-path architecture also has great performance in transient response because the compensation capacitor is reduced significantly. For the soft-start function, the subtractive-type and time-average capacitor multipliers are used to relax the restriction of the capacitance and the charging current. Consequently, it is easy to integrate the soft-start capacitance into a chip and the output overshoot voltage can be suppressed. A prototype converter fabricated with TSMC 0.35-μm 2P4M CMOS process verifies the effectiveness of the techniques of a dual-path error amplifier and two capacitor multipliers. Experimental results demonstrate the converter stability, transient response, and soft-start function. The transient recovery time and transient ripple are less than 20 μs and 25 mV, respectively, for the load current swing from 50 to 500 mA. Moreover, the soft-start time is up to 8 ms. With the proposed techniques, the external pins of the dc-dc converters are minimized and their performance is improved significantly.
He received a MSME degree from Carnegie Mellon University, a MSIE degree and a PhD degree in Technology, both from Purdue University. Dr. Chang has worked with several international corporations including Boeing, DaimlerChrysler, and Dassualt Systemes, as well as multiple small to medium size companies in both US and Asia. His current field of focus is in product innovation, process improvement, and technology diffusion.
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