engineering computer courses, directs graduate research, and performs research involving embedded microprocessor based systems. His current projects involve small system design, signal processing, and intelligent instrumentation.

Since 2008, she has been teaching as an assistant professor of the Department of Electrical and Computer Engineering at University of Hartford. Her current research interests are audio and speech signal processing, acoustic scene classification, speaker identification and verification, and teaching with new educational methods, including peer instruction, personal response systems, video games, and stateof-the-art CAD tools.

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Dr. Krista M. Hill is an associate professor in Electrical and Computer Engineering at the University of Hartford in Connecticut. PhD and MSEE from Worcester Polytechnic Inst. in Worcester MA, and previously a project engineer at Digital Equipment Corp. She instructs graduate and undergraduate computer engineering computer courses, directs graduate research, and performs research involving embedded microprocessor based systems. Her current projects involve small system design, signal processing, and intelligent instrumentation. Presenting Test Benches and Device Characteristics of Programmable Logic In An Introductory Logic Circuits Course AbstractIn the fall semester of 2011, we introduced the complex programmable logic device (CPLD) in our introductory logic circuits course. We specifically chose to use a CPLD as it is a modern logic device and includes the use of modern CAD tools and allows for hands-on activities. This paper considers test benches as well as CMOS device characteristics which are each important to the students' learning experience about CPLDs. In our prior research we identified test benches as a critical aspect in the use of logic circuit CAD tools. This paper first outlines our effort to better introduce students to test benches.Previously, in teaching with traditional TTL logic, the presentation of device characteristics such as signal Voltage levels, device loading, and propagation delay was immediately available. With the move of other educators from such a hands-on, to a hands-off approach using a development board, the presentation of device characteristics appears to be missing from the curriculum. In using our CPLD module we are discovering ways, in the context of CMOS devices, to introduce long standing basic concepts back into our introductory logic circuits course.Students in such an introductory course must be aware that they are dealing with real circuits and that logic signals are represented with physically measurable quantities. The logic circuits lab must be tangible, demonstrating the connection between digital and analog concepts, such as Voltage and current. Our students take their first electric circuits course the same semester as introductory logic circuits which means that these ideas are new to our students. As such we limit our discussion to presenting the device characteristics of logic circuits.The device characteristics of CMOS gates differ from traditional TTL devices in several important ways. Students discover that for CMOS the transition region between logic high and logic low is extremely narrow which causes a gate to be sensitive to noise present in a slowly changing input. Given such sensitivity, this paper presents a feedback test circuit useful for investigating the transition region. Also, given that some CPLDs include Schmitt trigger capability, our students investigate how such capability reduces sensitivity to noise. Students also learn about propagation delay and static loading such as that with an LED.In performing our research we assessed our stu...

In Verilog HDL; User-Defined-Priinitives (UDP) files are uscd to define primitive gates hy giving user-defined truth table description of logic cclls. This paper presents a hardnare-based acceleration simulator for UDP cells.