Background: Recent studies reported the responses of ustekinumab (UST) for the treatment of Crohn's disease (CD) differ among patients, while the cause was unrevealed. The study aimed to develop a prediction model based on the gene transcription profiling of patients with CD in response to UST.Methods: The GSE112366 dataset, which contains 86 CD and 26 normal samples, was downloaded for analysis. Differentially expressed genes (DEGs) were identified first. Gene Ontology (GO) and Kyoto Encyclopedia of Genes and Genomes (KEGG) pathway analyses were administered. Least absolute shrinkage and selection operator regression analysis was performed to build a model for UST response prediction. Results: A total of 122 DEGs were identified. GO and KEGG analyses revealed that immune response pathways are significantly enriched in patients with CD. A multivariate logistic regression equation that comprises four genes (HSD3B1, MUC4, CF1, and CCL11) for UST response prediction was built. The area under the receiver operator characteristic curve for patients in training set and testing set were 0.746 and 0.734, respectively.Conclusions: This study is the first to build a gene expression prediction model for UST response in patients with CD and provides valuable data sources for further studies.

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Because of flexibility of application and high cost performance, the low-and-middle-end FPGA has obtained an extensive market. As a fundamental memory structure, the FIFO memory is widely used in FPGA based project in various manners. But limited by the resources in chip and imperfection of development tools, the problem that the number of memory is insufficient while the overall capacity is enough often occurs in the implementation of multi-channel FIFO. This paper surveys various occasions of applications of multi-channel FIFO and put forward a method to achieve multi-channel FIFO in a single FPGA BlockRAM, which would support the parallel access to one port. The method may help to solve the problem mentioned above and improve the utilization of storage resources obviously. The steps of implementation and partial source code are present together with the detail analysis of simulation timing. Practical application indicates that the method is successful and effective.