This paper has proposed an architecture of optimised SIFT (Scale Invariant Feature Transform) feature detection for an FPGA implementation of an image matcher. In order for SIFT based image matcher to be implemented on an FPGA efficiently, in terms of speed and hardware resource usage, the original SIFT algorithm has been significantly optimised in the following aspects: 1) Upsampling has been replaced with downsampling to save the interpolation operation. 2) Only four scales with two octaves are needed for our image matcher with moderate degradation of matching performance. 3) The total dimension of the feature descriptor has been reduced to 72 from 128 of the original SIFT, which leads to significantly simplify the image matching operation. With the optimisation above, the proposed FPGA implementation is able to detect the features of a typical image of 640x480 pixels within 31 milliseconds. Therefore, compared with the existing SIFT FPGA implementation, which requires 33 milliseconds for an image of 320x240 pixels, a significant improvement has been achieved for our proposed architecture.

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(2015) Multiexposure laser speckle contrast imaging using a high frame rate CMOS sensor with a field programmable gate array. Optics Letters, 40 (20 A note on versions:The version presented here may differ from the published version or from the version of record. If you wish to cite this item you are advised to consult the publisher's version. Please see the repository url above for details on accessing the published version and note that access may require a subscription.For more information, please contact eprints@nottingham.ac.uk See discussions, stats, and author profiles for this publication at: https://www.researchgate.net/publication/282429234Multi-exposure laser speckle contrast imaging using a high frame rate CMOS sensor with a field programmable gate array The user has requested enhancement of the downloaded file. Received Month X, XXXX; revised Month X, XXXX; accepted Month X, XXXX; posted Month X, XXXX (Doc. ID XXXXX); published Month X, XXXX A system has been developed in which multi-exposure Laser Speckle Contrast Imaging (LSCI) is implemented using a high frame rate CMOS imaging sensor chip. Processing is performed using a Field Programmable Gate Array (FPGA). The system allows different exposure times to be simulated by accumulating a number of short exposures. This has the advantage that the image acquisition time is limited by the maximum exposure time and that regulation of the illuminating light level is not required. This high frame rate camera has also been deployed to implement laser Doppler blood flow processing enabling direct comparison of multiexposure laser speckle contrast imaging and Laser Doppler Imaging (LDI) to be carried out using the same experimental data. Results from a rotating diffuser indicate that both multi-exposure LSCI and LDI provide a linear response to changes in velocity.This cannot be obtained using single-exposure LSCI unless an appropriate model is used for correcting the response.