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This paper presents a parallel machine scheduling problem with rework probabilities, due-dates and sequencedependent setup times. It is assumed that rework probability for each job on a machine can be given through historical data acquisition. Since the problem is NP-hard in the strong sense, a heuristic algorithm is presented, which finds good solutions. The dispatching algorithm named MRPD (minimum rework probability with duedates) is proposed in this paper focusing on the rework processes. The performance of MRPD is measured by the six diagnostic indicators: total tardiness, maximum lateness, mean flow-time, mean lateness, the number of reworks and the number of tardy jobs. A large number of test problems are randomly generated to evaluate the performance of the proposed algorithm. Computational results show that the proposed algorithm is significantly superior to existing dispatching algorithms for the test problems.

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The effect of the reverse body bias V SB on the hot-electron-induced punch-through (HEIP) reliability of pMOSFETs with a thin gate dielectric at high temperatures was investigated for the first time. Experimental results indicate that the reverse V SB increased the HEIP degradation for a thin pMOSFET because of the increase in the maximum electric field E m due to the increase in the threshold voltage V th. The sensitivity of HEIP degradation to V SB increased with increasing body effect coefficient γ at a given oxide thickness T ox. However, a thin device (22 Å) showed a much stronger dependence of HEIP degradation on V SB due to the decrease in the velocity saturation length l, although it had a smaller γ than a thick device (60 Å). These new observations suggest that the body bias technique for improving circuit performance can cause a reliability problem of nanoscale pMOSFETs at high temperatures and impose a significant limitation on CMOS device scaling.