Device degradation due to hot carrier injection (HCI) in different Y-gate HEMT devices is thoroughly analyzed. To further understand the HCI reliability of the Y-gate HEMT devices, the device is fabricated with AlGaN/GaN structure with different top lengths (Ltop). An HCI stress time of 6000 seconds was conducted on these devices, while Vt stability in other stress time domains, leakage current, and transconductance degradation are also discussed. We have demonstrated that increasing the LTop length could avoid the virtual gate effect and disperse the influence of the electric field under HCI stress. Furthermore, the effects of trapping in various locations, such as in the bulk SiN or AlGaN/GaN interface has been discussed. These trapping effects caused by the HCI stress might be the source of the Vth shift. Overall, The large Y-gate HEMT showed the lowest degradation of DC characteristics after the long HCI stress test.

Device degradation due to hot carrier injection (HCI) in multi-fin 20 nm and 10 nm N- and P-type FinFET devices are thoroughly analyzed. To further understand the HCI reliability of the four FinFET devices, the device is fabricated with a standard Vt base and low Vt base gate stacks with different work functions. It is evident that: (i) The standard Vt device sustains lower effective stress bias due to the difference in threshold voltage, resulting in a more stable threshold voltage than the low Vt base device, and (ii) the transconductance of the single N- and P-type FinFET is more severely degraded than the multi-fin N- and P-type FinFET, mainly because multi N- and P-type Finfet has coupe effect, which effectively reduces the impact of HCI