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This study presents a novel short-circuit protection technique for DC-DC buck converters. The required short-circuit operating frequency is derived in order to avoid the effect of inherent propagation delay in the controller and power transistors. In this design, the short-circuit switching frequency is approximately 31% of the normal value. Simultaneously, the peak current limit is decreased to about 40% of the normal value to lower the power dissipation when a short-circuit event occurs. Once the fault condition is removed, the converters can automatically return to normal operation smoothly by clamping the soft-start signal using the feedback voltage of the output. A buck converter with the proposed technique has been successfully simulated and verified by a 0.6-μm CDMOS technology. The simulation results show that the power loss is only 17.1% of the constant current limit during the prolonged short-circuit situation, which significantly enhances the reliability of the chip. Furthermore, the converter is able to achieve smooth self-recovery as soon as the fault status is released.

An average current-sensing circuit integrated in a hybrid DC-DC buck converter is presented. Both the high-side and the low-side switch currents are fully sensed by detecting the filtered smooth voltage of the switch node, which maintains a substantially constant mode changing point and seamless transition between pulse width modulation (PWM) and pulse frequency modulation (PFM) under various duty cycles. The achieved mode changing point is almost independent of temperature and supply voltage. The proposed circuit is suitable for high-frequency hybrid DC-DC applications.