Proposed in this paper is the development of a photovoltaic module simulator, one capable of running an output characteristic simulation under normal operation according to various electrical parameters specified and exhibiting multiple advantages of being low cost, small sized, and easy to implement. In comparison with commercial simulation tools, Pspice and Solar Pro, the simulator developed demonstrates a comparable I-V as well as a P-V output characteristic curve. In addition, a series-parallel configuration of individual modules constitutes a photovoltaic module array, which turns into a photovoltaic power generation system with an integrated power conditioner.

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Current test resolution is confined by leakage elevation and variation in the nanometer static RAM. In this paper, we develop a novel scheme to highly improve the resolution by applying current test in power-gating sleep mode. A novel fine-grain power-gated adaptive-retention memory cell structure in the double threshold technology is designed for current testability. An LSB-selected decoder is also developed for fast test generation. Analyses on transistor level bridging faults prove the test effectiveness. The proposed scheme can explore the current resolution improvement up to the generic switch intensity ratio of the double threshold-voltage CMOS technology. From simulations in a 0.13 μm technology, the current resolution can be improved by about 40 dB, i.e., 100 times. Once current test can be renascent for embedded memory, the test time can be dramatically reduced.