The effect of hydrofluoric acid (HF) treatment on the surface electrical properties was observed in high-resistivity bulk silicon by the spreading resistance profiling (SRP) technique. It is found that the near-surface resistivity decreased in n-type silicon and increased in p-type silicon after HF treatment according to the SRP measurement. The variation of surface chemical elements and energy bands of HF-treated n-type and p-type (100) silicon has been characterized by x-ray photoelectron spectroscopy and ultraviolet photoelectron spectroscopy measurements. The results indicate that the surface Fermi level is shifted toward the conduction band minimum after HF treatment. The surface energy band bending caused by the surface electronegative groups (–F and –OH) was investigated by the method of First-principles calculation. Based on these findings, a method combining the SRP measurement with HF treatment to determine the conduction type of high-resistivity silicon was proposed, which is critical for the development of high-resistivity CZ silicon crystal growth.

The geometry and resistivity of trap-rich layer are the key parameters for 300mm trap-rich silicon-on-insulator (TR-SOI) wafers. In this paper, the evolution of warpage and resistivity of Poly-Si layers grown by atmospheric chemical vapor deposition (APCVD) with deposition temperature has been studied. The ability to quantify the surface grain size of undoped Poly-Si was evaluated among scanning electron microscopy (SEM), electron backscattering diffraction (EBSD), and transmission kikuchi diffraction (TKD). With a resolution scale of several nanometers, the fine grains on the surface of Poly-Si are accurately identified by TKD. It is confirmed that the decrease of compressive stress with deposition temperature is caused by the lower ratio of (110) grain orientation and the reduction of fine grains on the surface. However, while stress is released, the random grain boundaries (GBs) of Poly-Si will change into CSL low-Σ GBs with low recombination activity, which greatly lowers the film bulk resistivity and reduces its capacity to trap charges. Thus, a process window for the manufacturing of 300 mm TR-SOI wafers is therefore created by balancing the degradation of resistivity in the process of using deposition temperature to seek improvements in Poly-Si warpage.