Abstract. Implantable MEMS sensors are an enabling technology for diagnostic analysis and therapy in medicine. The encapsulation of such miniaturized implants remains a largely unsolved problem. Medically approved encapsulation materials include titanium or ceramics; however, these result in bulky and thick-walled encapsulations which are not suitable for MEMS sensors. In particular, for MEMS pressure sensors the chip surface comprising the pressure membranes must be free of rigid encapsulation material and in direct contact with tissue or body fluids. This work describes a new kind of encapsulation approach for a capacitive pressure sensor module consisting of two integrated circuits. The micromechanical membrane of the pressure sensor may be covered only by very thin layers, to ensure high pressure sensitivity. A suitable passivation method for the high topography of the pressure sensor is atomic layer deposition (ALD) of aluminium oxide (Al 2 O 3 ) and tantalum pentoxide (Ta 2 O 5 ). It provides a hermetic passivation with a high conformity. Prior to ALD coating, a high-temperature resistant polyimide-epoxy composite was evaluated as a die attach material and sealing compound for bond wires and the chip surface. This can sustain the ALD deposition temperature of 275 • C for several hours without any measurable decomposition. Tests indicated that the ALD can be deposited on top of the polyimide-epoxy composite covering the entire sensor module. The encapsulated pressure sensor module was calibrated and tested in an environmental chamber at accelerated aging conditions. An accelerated life test at 60 • C indicated a maximum drift of 5 % full scale after 1482 h. From accelerated life time testing at 120 • C a maximum stable life time of 3.3 years could be extrapolated.
High-temperature passive electronic becomes more and more important, e.g. in the field of deep drilling, aerospace or in automobile industry. For these applications, capacitors are needed, which are able to withstand temperatures up to 300 °C, which exhibit a low leakage current at elevated temperatures, a breakdown voltage above the intended operating voltage and a high capacitive density value. In this paper, investigations of 3D-integration and atomic layer deposition (ALD) techniques to achieve these features are presented. A highly n-doped Si-substrate acts as a bottom electrode. Medium- and high-k dielectrics represent the insulator and the upper electrode consists of Ru, TiN or TiAlCN. The materials can be used at elevated temperatures. At room temperature, the leakage current is less than 10 pA/mm2 without showing a soft-breakdown up to ± 15 V, indicating the absence of Fowler-Nordheim tunneling. At 300 °C and at 3 V the leakage current amounts about 1 nA/mm2 and at 5 V a soft-breakdown is detected.
Passive components like capacitors for harsh environments become more and more important, e. g. in the field of deep drilling, aerospace or in the automotive industry. They have to withstand temperatures up to 300 °C with a good performance concerning leakage current, breakdown voltage and capacitance density. The whole process flow has to be CMOS-compatible in order to offer the possibility for CMOS-integration. A highly n-doped Sisubstrate (doping concentration about 1020 cm-3, phosphorus) acts as bottom electrode to keep the process flow as simple as possible. The capacitors are 3D-integrated to achieve a high capacitance density. For the dielectric layer and the upper electrode, atomic layer deposited (ALD) materials are used. The combination of the medium- and high-k dielectrics and the electrode materials are optimized, as well as some of the ALD processes, to reach an optimum in leakage current and breakdown voltage. At a bias voltage of 3 V at room temperature, the leakage current amounts about 5 pA/mm², at 300 °C about 40 pA/mm². Up to ± 15 V for room temperature, respectively up to ± 10 V for 300 °C, no soft-breakdown is observed, indicating the absence of significant Fowler-Nordheim tunneling
Several applications in the fields of industrial sensors and power electronics are creating a demand for high operating temperature of 300 °C or even higher. Due to the increased temperature range new potential defect risks and material interactions have to be considered. As a consequence, innovation in semiconductor, devices and packaging technologies has to be accompanied by dedicated research of the reliability properties. Therefore various investigations on realizing high temperature capable electronic systems have shown that a multidisciplinary approach is necessary to achieve highly reliable solutions. In the course of the multi-institute Fraunhofer internal research program HOT-300 several aspects of microelectronic systems running up to 300 °C have been investigated like SOI-CMOS technology and circuits, silicon capacitor devices, a capacitive micromachined ultrasonic transducer (CMUT), ceramic substrates and different packaging and assembly techniques. A ceramic molded package has been developed. Die attach on different leadframe alloys were investigated using silver sintering and transient liquid phase bonding (TLPB). Copper and gold wire bonding was studied and used to connect the chips with the package terminals. Investigations in flip chip technology were performed using Au/Sn and Cu/Sn solder bumps for transient liquid phase bonding. High operating temperatures result in new temperature driven mechanisms of degradation and material interactions. It is quite possible that the thermomechanical reliability is a limiting factor for the technology to be developed. Therefore investigations on material diagnostics, reliability testing and modeling have been included in the project, complementing the technology developments.
This paper gives an overview of technologies and materials for microsystems and electronics in harsh environmental applications including the fabrication of a multifunctional MEMS with platinum metallization, high-temperature stable CMOS circuits and trench capacitors, ceramic-based packaging technologies as well as analysis of material parameters, simulation and reliability testing
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