In III-V-based magnetic semiconductors, the anomalous Hall effect (AHE) [1][2][3][4][5] has been playing a pivotal role in characterizing the magnetic properties, as was the case in our recently published Letter [6]. Since it was not made sufficiently clear that the Hall resistance loops presented were not raw data, we describe how the Hall resistance loops were obtained in our AHE measurements. In our magnetic semiconductor heterostructures, the longitudinal magnetoresistance (MR) effect is large. When we measure the Hall voltage of our samples in patterned Hall bars or in van der Pauw geometry, a large MR contribution is always superimposed on the Hall voltage data. This MR contribution results from the nonideal measurement geometry of the samples [1][2][3][4]. Thus, the raw Hall resistance R raw data (the raw Hall voltage divided by the current) in our case can be expressed as R raw B R H B R MR B. Here, R H is the intrinsic Hall resistance and R MR is the magnetoresistance (MR) contribution, which gives a nonzero value at B 0 (offset) to the raw Hall resistance R raw , and its magnetic-field dependence is an even function. Since the Hall resistivity in magnetic materials under a magnetic field applied perpendicular to the sample plane consists of the ordinary Hall effect and AHE [7], the sheet Hall resistance R H of our heterostructures can be expressed as [6,8,9]. Here, R O is the ordinary Hall coefficient, R S is the anomalous Hall coefficient, and M is the perpendicular component of magnetization of the sample. In the AHE, R H B is an odd function with respect to the polarity of the B (and also M), and thus, it is antisymmetric (or ''odd symmetric'') when a full field sweep is performed, i.e., R H B ÿR H ÿB [9]. On the other hand, R MR B is an even function with respect to the polarity of B (and also M) [1,2], and thus, it is even symmetric, i.e., R MR B R MR ÿB. Therefore, one can decompose the raw Hall resistance data R raw into the Hall resistance R H B R raw B ÿ R raw ÿB=2 and the magnetoresistance R MR B R raw B R raw ÿB=2. 2(j) show the raw Hall data R raw taken from Hall bars [as shown in Fig. 1(a), the channel width and length are 50 m and 200 m, respectively] of sample A and sample B, respectively, of Ref.[6] under a full field sweep of ÿ0:5 T B 0:5 T, which are the superposition of the intrinsic Hall resistance (R H ) and the MR contribution (R MR ). Note that the R raw curves in the figures are qualitatively similar to those observed in other 2(k) show the decomposed R H data of sample A and sample B, respectively. Figures 2(c), 2(f), 2(i), and 2(l) show the decomposed R MR data of sample B. In our Letter [6], we focused on the Hall resistance R H . In this way, we eliminated the MR contribution from the raw Hall resistance data using the method mentioned above, and plotted the intrinsic Hall resistance. Given the fact that the magnetotransport data show clear ferromagnetic hysteretic behavior and its temperature dependence together with the supporting data [10], we believe that there is ferroma...

The authors proposed and computationally analyzed nonvolatile static random access memory (NV-SRAM) architecture using a new type of spin transistor comprised of a metal-oxide-semiconductor field-effect transistor (MOSFET) and magnetic tunnel junction (MTJ) that is referred to as a pseudo-spin-MOSFET (PS-MOSFET). The PS-MOSFET is a circuit approach to reproduce the functions of spin transistors, based on recently progressed magnetoresistive random access memory technology. The proposed NV-SRAM cell can be simply configured by connecting two PS-MOSFETs to the storage nodes of a standard SRAM cell.

We show that suitably designed magnetic semiconductor heterostructures consisting of Mn delta (delta)-doped GaAs and p-type AlGaAs layers, in which the locally high concentration of magnetic moments of Mn atoms are controllably overlapped with the two-dimensional hole gas wave function, realized remarkably high ferromagnetic transition temperatures (T(C)). A significant reduction of compensative Mn interstitials by varying the growth sequence of the structures followed by low-temperature annealing led to high T(C) up to 250 K. The heterostructure with high T(C) exhibited peculiar anomalous Hall effect behavior, whose sign depends on temperature.

The power-gating (PG) ability of the authors' previously proposed nonvolatile delay flip-flop (NV-DFF) using pseudo-spin-transistors with spin transfer torque magnetic tunnel junctions (STT-MTJs) is computationally analysed. Break-even time (BET) for nonvolatile logic circuits, which is an important index of energy performance for PG systems, is also formulated for the first time. The BET of the proposed NV-DFF can be effectively reduced by the design of the pseudo-spin-transistor parts of the cell. The NV-DFF is applicable to coarse-and fine-grained PG architectures owing to its potential BET of sub-microseconds in practical CMOS logic applications.Introduction: Nonvolatile flip-flops (NV-FFs) have received considerable attention, since they are expected to play an important role for power-gating (PG) systems [1] that dramatically reduce static power dissipation in CMOS logic systems. Recently, we proposed a new nonvolatile delay flip-flop (NV-DFF) using spin-transistor architecture with spin-transfer-torque magnetic tunnel junctions (STT-MTJs) [2]. In the work reported in this Letter, we evaluated the ability of the proposed NV-DFF for PG and developed a power aware design technique of the NV-DFF for reducing its break-even time (BET) [3].