Coupled inductors can create multiple resonant frequencies in a compact high-order resonator. Together with proper nonlinear active circuitry, such a high-order resonator realizes a multi-mode oscillator covering a wide frequency range. Compared with conventional switched-resonator-based approaches that consume the same chip area, the proposed coupled-inductor-based resonator results in larger quality-factor, and hence, lower oscillator phase noise. In the proposed multi-mode oscillator that uses the multi-port coupled inductors, mode switching is achieved using independent active cores without using lossy switches in the resonator path. The behavior of the multi-mode resonator as a multiport network in an oscillator, design trade-offs, and switching transient response of the multi-mode oscillator have been studied analytically. As a proof of concept, an integrated voltage-controlled oscillator (VCO) with a 1.28-6.06 GHz tuning range is designed and fabricated in a 0.13 m CMOS technology. The triple-mode VCO uses a sixth-order resonator based on three coupled inductors with a compact common-centric layout. Depending on the oscillation frequency, the VCO current consumption is automatically adjusted from 2.9 to 6.1 mA to achieve a low phase noise throughout the frequency range. The measured phase noises at 1 MHz offset from carrier frequencies of 1.76, 2.26, 3.3, 4.5, and 5.6 GHz are 119.3, 120.15, 118.1, 117, and 113.5 dBc/Hz, respectively. The chip area, including the pads, is 1 mm 1 mm and the supply voltage is 1.5 V.Index Terms-CMOS, phase noise, voltage-controlled oscillator (VCO), wideband.

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A dual-output, compact, switched-capacitor DC-DC converter is presented for efficient voltage generation in low-power biomedical implants. By sharing the charge transfer capacitors between multiple independent switched-capacitor DC-DC converters, fewer capacitors are required, resulting in overall system size reduction. A proof-ofconcept capacitance-sharing, dual-output DC-DC converter, converting 1.2 V-0.4 V and 0.8 V, fabricated in a 0.13 μm CMOS technology, occupying 0.3 mm 2 and achieving a peak efficiency of 97.6% is demonstrated.

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