InAlAs/InGaAs high electron mobility transistors (HEMTs) on an InP substrate with well-balanced cutoff frequency f T and maximum oscillation frequency f max are reported. An InAlAs/InGaAs HEMT with 100-nm gate length and gate width of 2 × 50 µm shows excellent DC characteristics, including full channel current of 724 mA/mm, extrinsic maximum transconductance g m.max of 1051 mS/mm, and drain-gate breakdown voltage BV DG of 5.92 V. In addition, this device exhibits f T = 249 GHz and f max = 415 GHz. These results were obtained by fabricating an asymmetrically recessed gate and minimizing the parasitic resistances. The specific Ohmic contact resistance was reduced to 0.031 Ω•mm. Moreover, the f T obtained in this work is the highest ever reported in 100-nm gate length InAlAs/InGaAs InP-based HEMTs. The outstanding g m.max , f T , f max , and good BV DG make the device suitable for applications in low noise amplifiers, power amplifiers, and high speed circuits.

Anisotropic evolution of the step edges on the compressive-strained In0.2Ga0.8As/GaAs(001) surface has been investigated by scanning tunneling microscopy (STM). The experiments suggest that step edges are indeed sinuous and protrude somewhere a little way along the [11̄0] direction, which is different from the classical waviness predicted by the theoretical model. We consider that the monatomic step edges undergo a morphological instability induced by the anisotropic diffusion of adatoms on the terrace during annealing, and we improve a kinetic model of step edge based on the classical Burton—Cabrera—Frank (BCF) model in order to determine the normal velocity of step enlargement. The results show that the normal velocity is proportional to the arc length of the peninsula, which is consistent with the first result of our kinetic model. Additionally, a significant phenomenon is an excess elongation along the [11̄0] direction at the top of the peninsula with a higher aspect ratio, which is attributed to the restriction of diffusion lengths.

Zhou Xun(周 勋) a)b) , Luo Zi-Jiang(罗子江) a)c) , Guo Xiang(郭 祥) a) , Zhang Bi-Chan(张毕禅) a) , Shang Lin-Tao(尚林涛) a) , Zhou Qing(周 清) a) , Deng Chao-Yong(邓朝勇) a) , and Ding Zhao(丁 召) a) †

In order to predict the actual quantity of non-bulk GaAs layers after long-time homoepitaxy on GaAs (001) by theoretical calculation, a half-terrace diffusion model based on thermodynamics is used to calculate the ripening time of GaAs layers to form a flat morphology in annealing. To verify the accuracy of the calculation, real space scanning tunneling microscopy images of GaAs surface after different annealing times are obtained and the roughness of the GaAs surface is measured. The results suggest that the half terrace model is an accurate method with a relative error of about 4.1%.

This letter presents a high speed 2:1 regenerative dynamic frequency divider with an active transformer fabricated in 0.7 μm InP DHBT technology with of 165 GHz and of 230 GHz. The circuit includes a two-stage active transformer, input buffer, divider core and output buffer. The core part of the frequency divider is composed of a double-balanced active mixer (widely known as the Gilbert cell) and a regenerative feedback loop. The active transformer with two stages can contribute to positive gain and greatly improve phase difference. Instead of the passive transformer, the active one occupies a much smaller chip area. The area of the chip is only and it entirely consumes a total DC power of only 94.6 mW from a single −4.8 V DC supply. The measured results present that the divider achieves an operating frequency bandwidth from 75 to 80 GHz, and performs a −23 dBm maximum output power at 37.5 GHz with a 0 dBm input signal of 75 GHz.