We propose a novel all-optical phase shifted quantizer using cascade step-size MMI. The operation principle has been derived in detail. A 3-bit quantizer and a 5-bit quantizer are designed and simulated based on 220-nm SOI platform to verify the feasibility of the scheme, of which the lengths are all below 200 μm. To the best of our knowledge, they have the most compact footprint compared to the existing all-optical quantizers. In the end, the fabrication error analyses of the proposed quantizers are carried out to verify their stability.

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In this paper, we propose and fabricated a novel scheme of SOI-based 1 × 3 coupler with variable splitting ratio. The coupler consists of two cascaded MMI with different sizes, and a wide range of splitting ratios from 1:0.1:1 to 1:18:1 can be achieved by modifying the size of the first-step MMI. Using the structure of cascaded step-size MMI, this kind of device has a compact footprint of below 15 μm × 15 μm and simple fabrication process. Meanwhile, the simulation analyses prove that the proposed couplers have a large operation bandwidth above 60 nm and be robust to the fabrication errors. Couplers with several splitting ratios were fabricated and well measured. Based on the measurement results, the splitting ratios of fabricated couplers from 1:0.67:1 to 1:18:1 can be achieved, and stable performance with the transmission efficiencies above 80% can be maintained over 50 nm wavelength range, which is the largest operation bandwidth to the best of our knowledge.

When photonics integrated circuits (PICs) become more massive in scale, the area of chip can’t be taken full advantage of with 2×2 waveguide crossings with a 90° intersection angle. Crossings with small angles would be a better idea to further improve the area utilization, but few works have researched 2×2 crossings with different angles. In this paper, in order to have an ultra-compact footprint and a flexible intersection angle while keeping a high performance, we report a series of compact X-shaped waveguide crossings in silicon-on-insulator (SOI) waveguides for fundamental transverse electric (TE0) mode, designed by using finite-difference frequency-domain (FDFD) numerical analysis method and a global optimization method. Thanks to inverse design, a compact footprint as small as 4.5 µm2 and various angles between two input/output waveguides of 30°, 45°, 60°, 80° and 90° are achieved. Simulation results show that all crossings have good performance of insertion losses (ILs) within 0.1∼0.3 dB and crosstalks (CTs) within −20∼−50 dB in the wavelength range of 1525∼1582 nm. Moreover, the designed crossings were fabricated on a commercially available 220-nm SOI platform. The measured results show that the ILs of all crossings are around 0.2∼0.4 dB and the CTs are around −20 dB∼−32 dB; especially for the 30° intersection angle, the crossing has IL around 0.2 dB and CT around −31 dB in C band. Besides, we theoretically propose an approach of a primary structure processing technique to enhance the device performance with a more compact footprint. This technique is to remove the redundant structures in conjunction with the electric field distribution during the optimization procedure of inverse design. For the new 90° crossing structure produced by it, simulation results show that ILs of 0.29 ± 0.03 dB and CTs of −37 ± 2.5 dB in the wavelength range of 1500∼1600 nm are achieved and the footprint is shrunk by 25.5%.

Ultra-longitudinal-compact S-bends with flexible latitudinal distances (d) are proposed and experimentally demonstrated with ultralow loss and fabrication-friendly structures by three steps based on numerical optimization. During the first step (curve optimization), insertion losses (ILs) of S-bends are significantly reduced by optimizing transition curves based on Bézier curves. During the second step (shape optimization), the ILs are further minimized by varying the widths of S-bends to increase optical confinement. In the third step (curvature optimization), considering ease of fabrication, an optimization of curvature radius is used to ensure that all feature sizes for the S-bends are larger than 200 nm. Simulation results show that for S-bends with footprints of 2.5× d μm2, the ILs are less than (0.19, 0.045, 0.18, 0.27) dB in a wavelength range of 1400–1700 nm when d is set as (3, 6, 9, 12) μm, respectively. Then, the S-bends of 2.5× 3 μm2 and 2.5× 12 μm2 are fabricated on a commercial 220-nm silicon-on-insulator (SOI) platform. Experimental results show that the ILs of both are less than 0.16 dB in a wavelength range of 1420–1630 nm. The lowest ILs are 0.074 dB and 0.070 dB, respectively. Moreover, in addition to the ultralow ILs and ease of fabrication, our design is flexible for designing S-bends with a flexible value of d, which makes our approach practical in large-scale photonic integrated circuits.