QR decomposition plays a huge role in the adaptive filtering, control systems and a computation modeling of the physical processes. This paper concerns the issue of a QR decomposition hardware implementation features based on Givens rotation technique. For speed-up of the computation purposes used a pipelined architecture and CORDIC algorithm. The hardware costs and speed of a computation is evaluated for a different adders architectures in the CORDIC algorithm. The Givens rotation technique is used because it have a simple architecture and optimized hardware implementation.

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The fixed-point hardware architecture of the QR decomposition is constrained by a several issues that leads to decrease of a compute accuracy depending on a matrix size. In this article described the hardware architectures based on CORDIC algorithm and approximation functions. As a basis technique is used a Givens rotation technique, because it is a most suitable technique for hardware implementation