2016
DOI: 10.1049/el.2015.3881
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0.6‐V 2.1‐mW RF receiver based on passive mixing and master–slave common‐mode rejection technique in 65 nm CMOS

Abstract: A 0.6-V 2.1-mW RF receiver with regular threshold transistors is presented. A passive mixer which is built on low-power current-buffer is designed to build the RF front-end. A master-slave operational transconductance amplifier (OTA) structure which provides sufficient common-mode rejection ratio (CMRR) by auto-adjusting the gate of the triode-region biased tail current source is proposed as the building block of the intermediate-frequency (IF) modules. The prototype of the RF receiver is designed and fabricat… Show more

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Cited by 7 publications
(2 citation statements)
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“…Figure 12 indicates the circuit schematic of the proposed master-slave OTA structure [55] . The OTA employs complementary transconductance (gm) stages, and a common gate stage is applied to superimpose the currents of the gm stages.…”
Section: Master-slave Otamentioning
confidence: 99%
“…Figure 12 indicates the circuit schematic of the proposed master-slave OTA structure [55] . The OTA employs complementary transconductance (gm) stages, and a common gate stage is applied to superimpose the currents of the gm stages.…”
Section: Master-slave Otamentioning
confidence: 99%
“…The current reference generating circuit is composed of the low-voltage masterslave error amplifier A1 [7], the PMOS transistor P17, the off-chip resistor Rs and the series RC network R3 and C1. The output of the error amplifier is connected to the gate of P17.…”
Section: Circuit Designmentioning
confidence: 99%