2020 IEEE International Electron Devices Meeting (IEDM) 2020
DOI: 10.1109/iedm13553.2020.9372048
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1.2 kV Vertical GaN Fin JFETs with Robust Avalanche and Fast Switching Capabilities

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Cited by 63 publications
(43 citation statements)
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“…109 A recent example illustrates valuable robustness characteristics enabled by multidimensional device architectures where a GaN Fin-JFET was used as an avalanche GaN transistor. 78 Its avalanche current could flow either through the p-type gate or the n-type fin, depending on whether the gate was off or on. 110 With the gate on, GaN Fin-JFET shows a unique short-circuit capability at breakdown voltage, 105 and it fails with an open-circuit signature due to the spatial separation of electric field and current stresses, which is desirable for module and circuit safety.…”
Section: Discussionmentioning
confidence: 99%
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“…109 A recent example illustrates valuable robustness characteristics enabled by multidimensional device architectures where a GaN Fin-JFET was used as an avalanche GaN transistor. 78 Its avalanche current could flow either through the p-type gate or the n-type fin, depending on whether the gate was off or on. 110 With the gate on, GaN Fin-JFET shows a unique short-circuit capability at breakdown voltage, 105 and it fails with an open-circuit signature due to the spatial separation of electric field and current stresses, which is desirable for module and circuit safety.…”
Section: Discussionmentioning
confidence: 99%
“…41 The use of sub-micron fin channels in WBG JFETs has allowed for a shift from the D-mode to Emode operation. 77,78 As the fin dimension reduces in SiC Fin-JFETs, however, the sidewall ion implantation used for p-gate formation would degrade the channel mobility, which offsets the benefits of high channel density and results in a higher 𝑅 . This processing issue is not present for GaN Fin-JFETs due to their implantation-free fabrication.…”
Section: Finfet and Trigatementioning
confidence: 99%
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“…4(b), an effective electric field shielding effect can be formed, thus eliminating the leakage path across the Schottky region. In the meantime, the reverse leakage current flows through the reverse biased pn junction to the ohmic contact on the p-GaN structure, which has been observed in experimentally fabricated vertical GaN Fin-JFETs [33], [34]. As a result, by optimizing the p-doping concentration, the reverse breakdown and leakage behavior of the MPS diodes can be equivalent to that of a pn diode instead of a conventional planar SBD, leading to a dramatic improvement in the reverse characteristics.…”
Section: A Reverse Characteristicsmentioning
confidence: 97%
“…GaN JFET avalanche ruggedness has been demonstrated recently. [59] Another design includes a p-GaN layer in the gating region. The primary reason for employing such a structure would be to provide normally off behavior.…”
Section: Avalanche Ruggedness and Reliabilitymentioning
confidence: 99%