1/4-inch 2-mpixel MOS image sensor with 1.75 transistors/pixel

Mori, M.; Katsuno, Motonari; Kasuga, Shigetaka; Murata, Tsuyoshi; Yamaguchi, Takumi

doi:10.1109/jssc.2004.837028

Cited by 40 publications

(13 citation statements)

References 1 publication

Supporting

Mentioning

Contrasting

Unclassified

Order By: Relevance

“…We fabricated a CMOS image sensor pixel architecture with a four-transistor-type pinned photo-diode using the CMOS device fabrication process [38,39]. We evaluated the white-spot defects of the image sensor by using dark current spectroscopy (DCS) [40,41,42].…”

Section: Methodsmentioning

confidence: 99%

Proximity Gettering Design of Hydrocarbon–Molecular–Ion–Implanted Silicon Wafers Using Dark Current Spectroscopy for CMOS Image Sensors

Kurita

Kadono

Shigematsu

et al. 2019

Sensors

View full text Add to dashboard Cite

We developed silicon epitaxial wafers with high gettering capability by using hydrocarbon–molecular–ion implantation. These wafers also have the effect of hydrogen passivation on process-induced defects and a barrier to out-diffusion of oxygen of the Czochralski silicon (CZ) substrate bulk during Complementary metal-oxide-semiconductor (CMOS) device fabrication processes. We evaluated the electrical device performance of CMOS image sensor fabricated on this type of wafer by using dark current spectroscopy. We found fewer white spot defects compared with those of intrinsic gettering (IG) silicon wafers. We believe that these hydrocarbon–molecular–ion–implanted silicon epitaxial wafers will improve the device performance of CMOS image sensors.

show abstract

Section: Methodsmentioning

confidence: 99%

Proximity Gettering Design of Hydrocarbon–Molecular–Ion–Implanted Silicon Wafers Using Dark Current Spectroscopy for CMOS Image Sensors

Kurita

Kadono

Shigematsu

et al. 2019

Sensors

View full text Add to dashboard Cite

show abstract

“…The architecture of a 1T75 pinned photodiode pixel has been developed to reduce the pixel size and increase the sensor resolution, for applications in consumer devices such as mobile phones [4]. Figure 1 displays the circuit of a unit comprised of four photodiodes (dashed box).…”

Section: A 1t75 Pinned Photodiode Pixel Architecturementioning

confidence: 99%

BIST of interconnection lines in the pixel matrix of CMOS imagers

Fei

Moreau

Mir

2013

5th IEEE International Workshop on Advances in Sensors and Interfaces IWASI

View full text Add to dashboard Cite

ISBN : 978-1-4799-0039-8International audienceInterconnection lines in the sensors of CMOS imagers are used for pixel bias, addressing and readout. Catastrophic faults in these lines can cause parts of the pixel matrix to operate incorrectly and produce image defects like residual stripes and bands in images. These kinds of image defects are often difficult to remove by the image processing correction algorithm, and they are clearly visible as a sort of noise pattern. Among the defects in the pixel array, these catastrophic faults have most important influence on yield. In addition, partially degraded metal lines cannot be detected on todays' standard industrial testers for image sensors. These defects can evolve into catastrophic faults and they are the main cause of customer returns for many products. This paper proposes two built-in self-test (BIST) solutions to catch these defects in the pixel array, taking into account the industrial test constraints, namely increase of fault coverage, decrease of test time and test cost minimization

show abstract

“…Moreover, researchers are still trying to improve the sensitivity of the APS because of the reduction in the photo-detection area and supply voltage. [1][2][3][4][5][6][7][8][9][10][11][12][13][14][15].…”

Section: Introductionmentioning

confidence: 99%

High-speed binary CMOS image sensor using a high-responsivity MOSFET-type photodetector

Choi

Bae

et al. 2015

SPIE Proceedings

View full text Add to dashboard Cite

In this paper, a complementary metal oxide semiconductor (CMOS) binary image sensor based on a gate/body-tied (GBT) MOSFET-type photodetector is proposed. The proposed CMOS binary image sensor was simulated and measured using a standard CMOS 0.18-μm process. The GBT MOSFET-type photodetector is composed of a floating gate (n+-polysilicon) tied to the body (n-well) of the p-type MOSFET. The size of the active pixel sensor (APS) using GBT photodetector is smaller than that of APS using the photodiode. This means that the resolution of the image can be increased. The high-gain GBT photodetector has a higher photosensitivity compared to the p-n junction photodiode that is used in a conventional APS. Because GBT has a high sensitivity, fast operation of the binary processing is possible. A CMOS image sensor with the binary processing can be designed with simple circuits composed of a comparator and a Dflip-flop while a complex analog to digital converter (ADC) is not required. In addition, the binary image sensor has low power consumption and high speed operation with the ability to switch back and forth between a binary mode and an analog mode.

show abstract

1/4-inch 2-mpixel MOS image sensor with 1.75 transistors/pixel

Cited by 40 publications

References 1 publication

Proximity Gettering Design of Hydrocarbon–Molecular–Ion–Implanted Silicon Wafers Using Dark Current Spectroscopy for CMOS Image Sensors

Proximity Gettering Design of Hydrocarbon–Molecular–Ion–Implanted Silicon Wafers Using Dark Current Spectroscopy for CMOS Image Sensors

BIST of interconnection lines in the pixel matrix of CMOS imagers

High-speed binary CMOS image sensor using a high-responsivity MOSFET-type photodetector

Contact Info

Product

Resources

About