2008
DOI: 10.4028/www.scientific.net/msf.600-603.7
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100 mm 4HN-SiC Wafers with Zero Micropipe Density

Abstract: Recent advances in PVT c-axis growth process have shown a path for eliminating micropipes in 4HN-SiC, leading to the demonstration of zero micropipe density 100 mm 4HN-SiC wafers. Combined techniques of KOH etching and cross-polarizer inspections were used to confirm the absence of micropipes. Crystal growth studies for 3-inch material with similar processes have demonstrated a 1c screw dislocation median density of 175 cm-2, compared to typical densities of 2x103 to 4x103 cm-2 in current production wafers. … Show more

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Cited by 55 publications
(37 citation statements)
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“…Conventional counting of the ''medium''-size etch pits cannot be used for the 4H n+ substrates, and an alternative technique is needed. Leonard et al [7] published a procedure based on etching of the wafer C-face in the KOH/NaOH eutectic mixture at 350 1C for 2 hours. Etch pits found on the Cface were assigned to TSDs, which was confirmed by the synchrotron white beam X-ray topography.…”
Section: Determination Of Threading Screw Dislocationsmentioning
confidence: 99%
“…Conventional counting of the ''medium''-size etch pits cannot be used for the 4H n+ substrates, and an alternative technique is needed. Leonard et al [7] published a procedure based on etching of the wafer C-face in the KOH/NaOH eutectic mixture at 350 1C for 2 hours. Etch pits found on the Cface were assigned to TSDs, which was confirmed by the synchrotron white beam X-ray topography.…”
Section: Determination Of Threading Screw Dislocationsmentioning
confidence: 99%
“…These experiments were conducted at KOH-melt temperatures between 450 and 550 1C (etching time 5 min). An eutectic mixture of NaOH and KOH as proposed by [12] was tested as etchant too. For the eutectic mixture, the etching temperature was varied from 350 to 500 1C, and the etching time was changed from 10 min to 3 h.…”
Section: Defect Selective Etchingmentioning
confidence: 99%
“…Device quality layers are grown on off-cut substrates (usually 81 or 41 towards [1 1 2 0]) using the hot-wall chemical vapor deposition (HWCVD) technique [2] where the dislocations and micropipes (superscrew dislocations) threading along the growth direction, i.e., the c-axis, easily replicate into the epilayer. The density of micropipes, the most influential structural defect in high power devices [3,4], has been reduced considerably during the last decade [1]. On the other hand, the number of elementary dislocations in the bulk-grown substrates is still high.…”
Section: Introductionmentioning
confidence: 99%
“…Presently, SiC has the highest maturity of the wide bandgap semiconductor materials. Also, large area (4 00 ) and better crystalline quality bulk-grown substrates with semi-insulating, n-and p-types conductivity are commercially available [1].…”
Section: Introductionmentioning
confidence: 99%