2014
DOI: 10.7567/jjap.53.04eb04
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15-µm-pitch Cu/Au interconnections relied on self-aligned low-temperature thermosonic flip-chip bonding technique for advanced chip stacking applications

Abstract: In this paper, we report the development of reliable fine-pitch micro bump interconnections that used a high-precision room-temperature bonding approach. The accuracy of the bonding process is improved by modifying conventional bump/planar-bonding-pad interconnections to form self-aligned micro bumps/truncated inverted pyramid (TIP) bonding pads, i.e., misalignment self-correction elements (MSCEs). Thermosonic flip-chip bonding (FCB) is utilized to form reliable bonds between these MSCEs at acceptable low temp… Show more

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Cited by 10 publications
(6 citation statements)
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“…To overcome these limitations, existing literature has suggested self-alignment between the components and the interconnect layer. However, this may require a complicated fabrication process of three-dimensional structures [ 16 , 17 ]. Therefore, a simpler method of alignment is needed to perform efficient fabrication of functional electronic devices.…”
Section: Introductionmentioning
confidence: 99%
“…To overcome these limitations, existing literature has suggested self-alignment between the components and the interconnect layer. However, this may require a complicated fabrication process of three-dimensional structures [ 16 , 17 ]. Therefore, a simpler method of alignment is needed to perform efficient fabrication of functional electronic devices.…”
Section: Introductionmentioning
confidence: 99%
“…In our previous works, we have succeeded in demonstrating of reliable Au microbump interconnections with submicron range bonding accuracy. The conventional bonding bump and pad elements have been appropriately modified to construct a concave-convex pair, i.e., self-aligned intercon- nection elements (SIEs), [15][16][17][18][19][20][21] for having highly reproducible submicron range bonding precision in the x-and y-axes. Moreover, with this bonding approach, bonding height could be determined during the bonding period through the applied bonding forces [Fig.…”
Section: Introductionmentioning
confidence: 99%
“…Among 3D interconnects, thousands of 10-μm diameter Cu TSV and fine pitch Cu pillar (Sn bump) pairs in a 100-μm depth Si interposer are demonstrated to improve a wider bandwidth multi-function and large pin-out chip [4], [5]. However, current Cu pillars pitch larger than 20-μm cannot satisfy increasing CMOS device density [6], [7]. Although highly dense pairs of TSV and bump are required to realize vertical interconnection, there is still no clear solution to achieve the bump miniaturization.…”
Section: Introductionmentioning
confidence: 99%