19.5 An HCI-healing 60GHz CMOS transceiver

Abstract

The research of 60GHz CMOS transceivers has bloomed due to their capability of achieving low-cost multi-Gb/s short-range wireless communications [1]. Considering practical use of the 60GHz CMOS transceivers, longer operation lifetime with high output power is preferred to provide reliable products. Unfortunately, as indicated in [2], the output power capability of the transmitter will gradually degrade due to the hot-carrier-injection (HCI) effects in the standard CMOS transistors at large-signal operation (e.g. power amplifiers). It is because the inherently large voltage swing at the output of the power amplifiers (PAs) is the main source of the HCI damage. Unfortunately, a thick-oxide transistor, a common solution for reliability issues at lower frequencies, cannot be utilized for 60GHz CMOS PA design due to its limited maximum oscillation frequency (f max ).Conventional solutions are demonstrated to be very effective to solve the HCI issues for the 60GHz CMOS PAs. Lowering the supply voltage [2,3] and using cascode topology [4] can greatly reduce the HCI damage at the cost of low output power, linearity, and efficiency. Power combining [5] and beamforming [6] techniques can be used to compensate the degraded output power and linearity. However, the deteriorated efficiency remains unimproved. This paper presents a 60GHz CMOS transceiver with HCI damage healing function, which can detect the HCI damage to the transistor used in the PA and heal it afterwards. The proposed HCI-healing technique relieves the trade-off between the HCI reliability and the system performance, which guarantees longer operation lifetime with high output power. The proposed transceiver demonstrates an EVM of -27.9dB in 16QAM and can transmit 7Gb/s within 2.16GHz bandwidth. The transmitter, receiver, and PLL consume 174mW, 144mW, and 44mW from a 1.2V supply, respectively.A non-volatile memory using a standard CMOS transistor has been reported with 100-times program/erase endurance [7], where the charge trap and ejection mechanism in gate oxide is applied to control the threshold voltage. The HCI effects have the same damaging mechanism as the charge trap, which degrade the threshold voltage (V t ), channel carrier mobility (μ), unit-area gate oxide capacitance (C ox ), and therefore drain current [2]. In this work, a charge-ejection technique is applied to a mm-Wave power amplifier as shown in Fig. 19.5.1. The proposed HCI-healing transistor module is composed of a core NMOSFET with deep n-well, a tail-switching transistor, an MIM transmission line (MIM TL) with a MIM capacitor array attached alongside, and a high-density decoupling capacitor. The body terminal of the core NMOSFET (V B ) is connected to the HCI-healing bias (V H ) through a current-limiting resistor. When the module is in HCI-healing status, the tail transistor is switched off, which creates a high impedance (high Z) terminal for the source of the core NMOSFET. A high voltage is applied to V H generating a strong vertical electric field between substrate and gate to ej...

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