1D Nanostructure-Based Piezo-Generators

Gogneau, N.

doi:10.3390/nano9101474

Cited by 2 publications

(2 citation statements)

References 15 publications

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“…Semiconducting nanowires (NWs) are promising one-dimensional objects with wide potentialities for integrated photonics, − energy-harvesting devices, − (photo-)catalysis, and sensing . Optimizing their geometry and composition during their formation enables a fine-tuning of intrinsic properties that are critical for application performance. , Among existing techniques to grow NWs under ultra-high-vacuum (UHV) conditions, the vapor–liquid–solid (VLS) method using molecular beam epitaxy (MBE) is the most popular.…”

Section: Introductionmentioning

confidence: 99%

A Photoemission Analysis of Gold on Silicon Regarding the Initial Stages of Nanowire Metal-Catalyzed Vapor–Liquid–Solid Growth

et al. 2022

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When semiconducting nanowires are grown by vapor–liquid–solid mechanism using gold as catalyst, the first stages, i.e., gold deposition and subsequent annealing, are of prime importance as they determine nanowire size and repartition. In this paper, we aim at identifying key factors which drive the first stages when growing nanowires, viz., surface preparation of the silicon wafer, gold deposition, and subsequent annealing. As silicon wafer surface preparation may or may not include the etching of the silica protecting overlayer, we have investigated the surface composition (a) after in situ gold deposition on Si(001) substrates that are either clean or “epiready” (i.e., SiO2-covered) and (b) during the subsequent in situ annealing from room temperature up to 600 °C, using soft X-ray photoelectron spectroscopy at the TEMPO beamline (SOLEIL synchrotron radiation facility). When Au is deposited directly on clean Si(001), our results reveal the formation of a AuSi alloy at surface, even when Au deposition is performed at room temperature. Postdeposition annealing prompts a complex dewetting/demixing of this initial AuSi alloy. When gold is deposited at room temperature on SiO2-covered Si(001) substrate, it slightly sinks into silica. During postdeposition annealing, a complex dynamic process takes place: As the temperature increases, gold gradually sinks into the silica and catalyzes its decomposition, which starts at 365 °C thus lower than usual (840 °C). This etching process is concomitant with Au dewetting on silica, which acts as a barrier against alloying. This gold dewetting implies local changes in surface potential and therefore local shifts of the Au–Si region toward higher binding energies. The result is a superposition of spectra, which can be used to monitor Au dewetting and therefore substrate coverage by Au. When Au finally reaches the substrate after completing the catalytic desorption of silica, it undergoes mixing with Si as on a clean Si substrate. All these results give new insights in the VLS mechanism, which is widely used for growing nanowires.

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Section: Introductionmentioning

confidence: 99%

A Photoemission Analysis of Gold on Silicon Regarding the Initial Stages of Nanowire Metal-Catalyzed Vapor–Liquid–Solid Growth

et al. 2022

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“…GaN nanowire arrays are promising candidates to be the building blocks for future nanoelectronics applications, such as lasers, LEDs, and solar cells with excellent performance [20,21]. The piezoelectric properties of these materials can be exploited to make nano-generators for extracting environmental energy [22].…”

Section: Introductionmentioning

confidence: 99%

Design, optimization, and analysis of Si and GaN nanowire FETs for 3 nm technology

Thakur

Chaturvedi

2021

Semicond. Sci. Technol.

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Nanowires, due to their unique properties, are emerging as the building blocks of the next-generation electronics industry and will play a critical role in both low-and high-performance circuits and systems. This work presents the design, optimization, and analysis of a silicon (Si) and gallium-nitride nanowire field-effect transistor (GaN NW FET) to evaluate its performance at the ultra-scaled device dimensions required for GaN NW FETs in the electronics industry in order to increase the packing density and overall performance of the device. The analysis was carried out using self-consistent Poisson and Schrödinger equations based on a non-equilibrium Green function (NEGF) approach using Silvaco ATLAS. A reduction of 84.07% in the 'off' current was observed for the GaN NW FET, as compared to its Si counterparts, which reveals the requirement for a GaN NW FET at extremely scaled dimensions for 'off' state leakage suppression. Optimization of the electrostatic control mechanism, gate oxide, gate oxide thickness (t ox ), and metal work functions (ϕ ms ) was performed using quantum simulation models to investigate the influence of these parameters on the device performance. A way of improving the I on /I off ratio of the device has been reported using metal contact length and width variations. A 40% reduction in the subthreshold swing value offers improvements in the electrostatic control I on /I off ratio of ∼10 4 , ∼10 5 , and 10 2 due to the respective optimizations of the metal contact length (L c ), metal contact width (W c ), and metal work function (ϕ ms ) of the GaN NW FET, compared to the Si NW FET, thus making the GaN NW FET an intriguing option for digital electronics applications. A comparison of the semi-classical (Drift Diffusion_Mode Space) and quantum (Non-Equilibrium Green Function_Mode Space) transport models was also carried out to reveal the importance of the accuracy of these models at such low dimensions. This optimization and analysis will help us to further improve the performance of experimental work and will act as a reference for the same. This study reveals the performance advantages of the GaN NW FET over the Si NW FET for transistor applications in the electronics industry and can serve as a reference point for the researchers working in this area. To the best of our knowledge, no such comparison has been reported so far for Si and GaN NW FETs using 3 nm technology.

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1D Nanostructure-Based Piezo-Generators

Abstract: With the amount of connected objects constantly on the rise, both in our daily life and in high-technology applications, it becomes critical to deal with their associated increase in energy consumption [...]

Cited by 2 publications

References 15 publications

A Photoemission Analysis of Gold on Silicon Regarding the Initial Stages of Nanowire Metal-Catalyzed Vapor–Liquid–Solid Growth

A Photoemission Analysis of Gold on Silicon Regarding the Initial Stages of Nanowire Metal-Catalyzed Vapor–Liquid–Solid Growth

Design, optimization, and analysis of Si and GaN nanowire FETs for 3 nm technology

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