2-D Analytical Drain Current Model of Double-Gate Heterojunction TFETs With a SiO₂/HfO₂ Stacked Gate-Oxide Structure

Electrostatic Characteristics of High-k Stacked Gate-All-Around Heterojunction Tunnel Field Effect Transistor using Superposition Principle

“…Vishnoi et al [17] proposed the BTBT current model for DG-GAA-TFETs irrespective of the depletion regions at JSC and JDC by pseudo-2-D analytic modeling. The DMG in DG-TFETs exhibits better drive current and SS than SMG counterpart as reported by Kumar et al [18] and Jain et al [19]. Kumar et al [20] and Prabhat et al [21] reported the modeling of drive current and surface potential for DMG with SG/DG TFET structures respectively.…”

Enhancement and Modeling of Drain Current in Negative Capacitance Double Gate TFET

“…Hence, the rate of total carriers generated due to tunneling gives the drain current. TLA is an accurate method to find drain current [8], [16]. Fig 3 shows the pictorial representation of TLA.…”

A Study on the Effect of the Structural Parameters and Internal Mechanism of a Bilateral Gate-Controlled S/D Symmetric and Interchangeable Bidirectional Tunnel Field Effect Transistor

“…The characteristic analysis and structure optimization of the gate dielectric material [13][14][15] and gate dielectrics with different dielectric constants have been performed [15][16][17][18][19][20]. In device physics, the analytical modeling of TFETs with the double-gate structure [21][22][23][24][25][26][27] and surrounding-gate structure [28][29][30][31][32][33] has also been extensively performed. One disadvantage of silicon-based TFETs compared to MOS-FETs is the smaller forward current, and the magnitude of the forward current is determined by the efficiency of the tunneling current generation.…”