22.4 A 24Gb/s 0.71pJ/b Si-photonic source-synchronous receiver with adaptive equalization and microring wavelength stabilization

Abstract

Wavelength-division multiplexing (WDM) optical interconnect architectures based on microring resonator devices offer a low-area and energy-efficient approach to realize both high-speed modulation and WDM with high-speed transmit-side ring modulators and high-Q receive-side drop filters [1][2][3]. While CMOS optical front-ends have been previously developed that support data-rates in excess of 20Gb/s, these designs often do not offer the retiming and deserialization functions required to form a complete link [1,4]. Furthermore, along with the requirements of a sensitive energy-efficient receiver front-end with low-complexity clocking, wavelength stabilization control is necessary to compensate for the fabrication tolerances and thermal sensitivity of microring drop filters. In this work, a 24Gb/s hybrid-integrated microring receiver is demonstrated the incorporates the following key advances: 1) a low-complexity optically-clocked source-synchronous receiver with LC injection-locked oscillator (ILO) jitter filtering; 2) a large input-stage feedback resistor TIA cascaded with an adaptively-tuned continuous-time linear equalizer (CTLE) for improved sensitivity and bandwidth; 3) a receive-side thermal tuning loop that stabilizes the microring drop filter resonance wavelength with minimal impact on receiver sensitivity. Figure 22.4.1 shows a hybrid-integration WDM receiver, with the silicon photonic IC with microring drop filters and waveguide photodetectors connected via short wirebonds to the CMOS receiver IC with the developed optical front-end circuits. Here the microring drop filters share a common bus waveguide and select a given wavelength per channel to direct onto a waveguide photodetector. In order to allow for low-complexity receive-side clocking, we develop a source-synchronous architecture with an optically forwarded clock from the WDM transmitter on one of the available wavelengths. The microring drop filters used in this work have 5μm radius and 18000 quality factor, while the waveguide photodetectors have 40fF capacitance, 0.45A/W responsivity, and 30GHz bandwidth. While this hybrid integration strategy allows for independent optimization of the photonic devices and CMOS circuits, it does add potentially a wide range of interconnect parasitics that must be compensated for in the optical front-end design.The CMOS optical receiver chip shown in Fig. 22.4.2 consists of one forwardedclock receiver channel that provides a synchronous 12GHz differential clock to the four data channels. While previously an optically-forwarded clock receiver was demonstrated at 8Gb/s with an injection-locked ring oscillator [3], at data-rates in excess of 20Gb/s the wideband clock receiver input-referred noise can induce unacceptable output jitter that is not sufficiently filtered with a wide-bandwidth ring oscillator. This design utilizes a 12GHz LC injection-locked oscillator, which allows for improved jitter filtering, while maintaining correlated jitter tracking with the data channels. Simulations show that a 12GHz 40μA inp...

A 10Gb/s Si-photonic transceiver with 150μW 120μs-lock-time digitally supervised analog microring wavelength stabilization for 1Tb/s/mm2 Die-to-Die Optical Networks

“…Silicon photonics has allowed cost reduction and performance improvement for optical interconnects for the past few years, and short-reach wavelength-division-multiplexed (WDM) links have recently emerged thanks to the introduction of microring modulators and filters [1][2][3][4][5]. Nevertheless, the promise of optical networks-on-chip foreseen in [1] has to face the integration challenges of scalable low-footprint elementary drivers and robust operation under heavy thermal stress due to self-heating of the cores with varying loads.…”

“…1 presents five different experiments integrated in the chip to validate our approach, starting from a single modulator to a complete 4-wavelength WDM link in the 1310nm band. As the microrings have a sharp temperature-dependent resonance with Q-factors up to 30000, they can be mapped to different wavelengths on the same waveguide, but require fine-tuning of the microrings [2][3][4][5] to the laser wavelength using temperature tuning within 0.1°C accuracy by Joule effect in a resistive heater inside the ring. Each wavelength is modulated on the Tx side using carrier-depletion PN-rings and filtered using thermally-tuned passive rings to a germanium photodiode whose photocurrent is demodulated on the Rx side.…”

DWDM silicon photonic transceivers for optical interconnect

“…Clear eye openings are demonstrated at 10 Gbps with external pre-emphasized electrical signals at all five channels [4]. We designed a custom CMOS transceiver [5][6][7][8][9][10] consisting of a pre-emphasis driver for the microring modulator at transmitter and a self-adaptive receiver that optimizes between power consumption and input sensitivity to accommodate the channel quality variations. A 4 Vpp CMOS driver shows 5 Gbps operation with energy efficiency of 808 fJ/bit [5][6][7], and a 2 Vpp driver shows 9 Gbps operation with 473 fJ/bit with improved contact resistance of the microring [8].…”

“…A forward-clock receiver based on injection-locked oscillator allows for low-overhead data retiming and deserialization and shows 8 Gbps operation with -12.7 dBm sensitivity and 275 fJ/bit energy efficiency when integrated with a discrete p-i-n photodiode [5][6][7]. A higher data rate CMOS RX prototype illustrates the tradeoff in performance and energy efficiency, with a multi-channel WDM hybrid-integrated photonic receiver based on microring drop filters and waveguide photodiodes achieving -8.2dBm sensitivity at 25 Gbps and 680 fJ/bit [9,10].…”

“…Heating red-shifts the resonance wavelength over a wide range whereas the bias tuning blue-shifts the wavelength with low power consumption. Both thermal-tuning and bias-tuning circuits are implemented for each microring for automatic wavelength locking [4,10] to adjust the resonant wavelength of the microring. A control loop for bias-based tuning circuits in a 2Vpp driver increases the anode voltage of the p-i-n diode to blue-shift the resonant wavelength with an efficiency of 6.8µW/GHz.…”