2020 IEEE International Solid- State Circuits Conference - (ISSCC) 2020
DOI: 10.1109/isscc19947.2020.9063126
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25.8 A Near- Threshold-Voltage Network-on-Chip with a Metastability Error Detection and Correction Technique for Supporting a Quad-Voltage/Frequency-Domain Ultra-Low-Power System-on-a-Chip

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Cited by 4 publications
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“…Compared with the traditional EDAC technology, the total area is reduced by 26%-33%, and the number of error detection registers is reduced by 2.9-4.3 times. The metastability condition detection and correction scheme of Shanghai Jiao Tong University [27] introduced a circuit based on double-sampling to detect whether the input data are too close to the clock edge of the receiver, which is defined as a metastable condition. The technique ameliorates energy efficiency and the data rate by 27.2% and 21.1%, respectively.…”
Section: Research Status Of Direct Monitoring Avfs Technologymentioning
confidence: 99%
“…Compared with the traditional EDAC technology, the total area is reduced by 26%-33%, and the number of error detection registers is reduced by 2.9-4.3 times. The metastability condition detection and correction scheme of Shanghai Jiao Tong University [27] introduced a circuit based on double-sampling to detect whether the input data are too close to the clock edge of the receiver, which is defined as a metastable condition. The technique ameliorates energy efficiency and the data rate by 27.2% and 21.1%, respectively.…”
Section: Research Status Of Direct Monitoring Avfs Technologymentioning
confidence: 99%